EFI Platform IDE Initialization Protocol Specification v0.3
Intel® Platform Innovation Framework for EFI Platform IDE Initialization Protocol
Specification, Version 0.3.
This specification defines the core code and services that are required for an implementation of the Platform IDE
Initialization Protocol of the Intel® Platform Innovation Framework for EFI (hereafter referred ...to as the "Framework"). This protocol abstracts the platform
aspects of the IDE channels that the IDE-controller-specific driver cannot know and is used by an IDE controller driver to obtain platform-specific information.
This specification does the following:
• Describes the basic components of the Platform IDE Initialization Protocol
• Provides code definitions for the
Platform IDE Initialization Protocol and platform-IDE-related type definitions that are architecturally required by the Intel® Platform Innovation Framework for
EFI Architecture Specification
Data structure descriptions
Intel® processors based on 32-bit Intel® architecture (IA-32) are “little endian”
machines. This distinction means that the low-order byte of a multibyte data item in memory is at the lowest address, while the high-order byte is at the highest
address. Processors of the Intel® Itanium® processor family may be configured for both “little endian” and “big endian” operation. All implementations designed to
conform to this specification will use “little endian” operation.
In some memory layout descriptions, certain fields are marked reserved. Software must
initialize such fields to zero and ignore them when read. On an update operation, software must preserve any reserved field.
August 9, 2004
the full EFI Platform IDE Initialization Protocol