Interlaken and Interlaken Look-Aside are scalable, chip-to-chip interconnect protocols designed to enable transmission speeds from 10 to 300 Gbps and beyond. Using the latest transceiver technology and a flexible protocol layer, Interlaken and Interlaken Look-Aside Intel FPGA intellectual property (IP) cores provide the performance and productivity needed for emerging applications that require scalability and integration onto a single FPGA. Both IP cores feature a unique balance of soft and hard logic IP to enable such integration and scalability without the additional silicon costs. By providing this integrated balance, maximum flexibility and performance can be achieved
With the release of Intel's next-generation Intel® Arria® 10 FPGAs and SoC FPGAs, the Interlaken Intel FPGA IP portfolio accomplishes major development milestones including third-generation soft IP (includes media access control (MAC)) and second-generation hardened IP (includes physical coding sublayer (PCS) / physical medium attachment (PMA)). These seasoned, battle-tested cores continue to provide the additional robustness and maturity required for new, more intelligent systems.