Interlaken / Interlaken Look-Aside

Overview

Interlaken and Interlaken Look-Aside are scalable, chip-to-chip interconnect protocols designed to enable transmission speeds from 10 to 300 Gbps and beyond. Using the latest transceiver technology and a flexible protocol layer, Interlaken and Interlaken Look-Aside Intel FPGA intellectual property (IP) cores provide the performance and productivity needed for emerging applications that require scalability and integration onto a single FPGA. Both IP cores feature a unique balance of soft and hard logic IP to enable such integration and scalability without the additional silicon costs. By providing this integrated balance, maximum flexibility and performance can be achieved

With the release of Intel's next-generation Intel® Arria® 10 FPGAs and SoC FPGAs, the Interlaken Intel FPGA IP portfolio accomplishes major development milestones including third-generation soft IP (includes media access control (MAC)) and second-generation hardened IP (includes physical coding sublayer (PCS) / physical medium attachment (PMA)). These seasoned, battle-tested cores continue to provide the additional robustness and maturity required for new, more intelligent systems.

Interlaken Interconnect Protocol

The Interlaken Intel® FPGA IP core is ideal for: multi-terabit routers and switches for access, carrier Ethernet and data center applications that demand IP configurability to optimize various traffic profiles, and scalability for next-generation platforms.

It is Interlaken Protocol Definition v1.2 compliant and allows system developers to achieve high bandwidth throughput in their systems. This pre-built, ready-to-go IP building block shortens the design cycle resulting in faster time to market.

Interlaken Look-Aside Interconnect Protocol

Interlaken Look-Aside Intel® FPGA IP core is suited for coprocessing packet classification typically used for networking applications, which include quality of service routing, traffic profiling, and firewall functions. The IP's low-latency packet interface, coupled with its efficient data processing capability, enables high degree of design scalability for emerging network applications.

It is Interlaken Look-Aside Protocol Definition v1.1 compliant and allows system developers to eliminate the computational bottlenecks associated with older, packet classification methods.