DSP 1080p HD Video
Intel developed a video design framework that enables the fastest design cycle for video application. The components of this framework are as follows:
- A library of basic building blocks of video and image processing (VIP) intellectual property (IP) cores designed for easy plug-and-play type interface.
- A low-overhead streaming video interface protocol, which is available as an open standard.
- System integration tools such as the Platform Designer (formerly Qsys) that provide an automated way of generating control and arbitration logic.
- A suite of high definition (HD) reference designs that can be used as a starting point for your video datapath designs.
The Avalon® streaming interface (Avalon-ST) video protocol is designed for sending video and controlling data from one video processing block to the other.
This protocol is open and you can freely download the specification via the web. Using this specification does not bind you to using Intel® FPGAs. However, all the video IP and video reference designs utilize this interface.
Figure 1 shows how different video functions can be connected using this protocol. More information on this protocol is available in the ‘Interface’ section of the Video and Image Processing Suite User Guide.