Article ID: 000080080 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Is there any known issue using the On-chip parallel termination (RT) with calibration in Stratix III, Stratix IV, and Arria II GZ devices in the Quartus II software version 11.0 and 11.0 SP1?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Yes, there is an issue for the OCT RT with calibration setting in the configuration file generated by the Quartus® II software version 11.0 and 11.0 SP1. Although the OCT RT with calibration is enabled for the specific pins in assignment editor and the setting is reflected in the compilation report, the Quartus II software does not correctly enable the configuration bits for OCT RT setting in the configuration file.

 

This issue only impacts Stratix® III, Stratix IV, and Arria II GZ device families. It will be fixed in the next release of the Quartus II software. To overcome this issue in Quartus II software version 11.0 and 11.0SP1, you need to install the following patch and perform a full compilation of your design:

Related Products

This article applies to 2 products

Intel® Programmable Devices
Stratix® III FPGAs