# INFO: 896 ns --------------------------------------------------------- # INFO: 896 ns Unlocking the BFM shared memory for initialization... # INFO: 896 ns # INFO: 896 ns Performing the basic configuration of the Root Port... # INFO: 896 ns # INFO: 944 ns Completed initial configuration of Root Port. # INFO: 944 ns --------------------------------------------------------- # INFO: 944 ns # INFO: 4213 ns RP LTSSM State: DETECT.ACTIVE # INFO: 4661 ns EP LTSSM State: DETECT.ACTIVE # INFO: 5301 ns RP LTSSM State: POLLING.ACTIVE # INFO: 5653 ns EP LTSSM State: POLLING.ACTIVE # INFO: 18165 ns RP LTSSM State: POLLING.CONFIG # INFO: 18517 ns EP LTSSM State: DETECT.QUIET # INFO: 21797 ns EP LTSSM State: DETECT.ACTIVE # INFO: 22869 ns EP LTSSM State: POLLING.ACTIVE # INFO: 35733 ns EP LTSSM State: DETECT.QUIET # INFO: 39013 ns EP LTSSM State: DETECT.ACTIVE # INFO: 39989 ns EP LTSSM State: POLLING.ACTIVE # INFO: 52853 ns EP LTSSM State: DETECT.QUIET # INFO: 56133 ns EP LTSSM State: DETECT.ACTIVE # INFO: 57109 ns EP LTSSM State: POLLING.ACTIVE # INFO: 59797 ns EP LTSSM State: POLLING.CONFIG # INFO: 61013 ns EP LTSSM State: CONFIG.LINKWIDTH.START # INFO: 61333 ns RP LTSSM State: CONFIG.LINKWIDTH.START # INFO: 62325 ns EP LTSSM State: CONFIG.LINKWIDTH.ACCEPT # INFO: 63125 ns RP LTSSM State: CONFIG.LINKWIDTH.ACCEPT # INFO: 63765 ns RP LTSSM State: CONFIG.LANENUM.WAIT # INFO: 64629 ns EP LTSSM State: CONFIG.LANENUM.WAIT # INFO: 64949 ns EP LTSSM State: CONFIG.LANENUM.ACCEPT # INFO: 65045 ns RP LTSSM State: CONFIG.LANENUM.ACCEPT # INFO: 65717 ns RP LTSSM State: CONFIG.LANENUM.WAIT # INFO: 66037 ns RP LTSSM State: CONFIG.LANENUM.ACCEPT # INFO: 66677 ns RP LTSSM State: CONFIG.COMPLETE # INFO: 67285 ns EP LTSSM State: CONFIG.COMPLETE # INFO: 68501 ns EP LTSSM State: CONFIG.IDLE # INFO: 68789 ns RP LTSSM State: CONFIG.IDLE # INFO: 68981 ns RP LTSSM State: L0 # INFO: 69205 ns EP LTSSM State: L0 # INFO: 69240 ns # INFO: 69240 ns Configuring Bus 000, Device 000, Function 00 # INFO: 69240 ns RP Read Only Configuration Registers: # INFO: 69240 ns Vendor ID: 1172 # INFO: 69240 ns Device ID: E001 # INFO: 69240 ns Revision ID: 01 # INFO: 69240 ns Class Code: FF0000 # INFO: 69240 ns Interrupt Pin: INTA# used # INFO: 69240 ns # INFO: 69920 ns RP Base Address Registers: # INFO: 69920 ns # INFO: 69920 ns BAR Address Assignments: # INFO: 69920 ns BAR Size Assigned Address Type # INFO: 69920 ns --- ---- ---------------- # INFO: 69920 ns BAR0 Disabled # INFO: 69920 ns BAR1 Disabled # INFO: 69920 ns ExpROM Disabled # INFO: 69920 ns # INFO: 69920 ns I/O Base and Limit Register: Disable # INFO: 69920 ns Prefetchable Base and Limit Register: Disable # INFO: 69920 ns # INFO: 69992 ns PCI MSI Capability Register: # INFO: 69992 ns 64-Bit Address Capable: Supported # INFO: 69992 ns Messages Requested: 4 # INFO: 69992 ns # INFO: 70136 ns RP PCI Express Slot Capability Register (00040000): # INFO: 70136 ns Attention Button: Not Present # INFO: 70136 ns Power Controller: Not Present # INFO: 70136 ns MRL Sensor: Not Present # INFO: 70136 ns Attention Indicator: Not Present # INFO: 70136 ns Power Indicator: Not Present # INFO: 70136 ns Hot-Plug Surprise: Not Supported # INFO: 70136 ns Hot-Plug Capable: Not Supported # INFO: 70136 ns Slot Power Limit Value: 0 # INFO: 70136 ns Slot Power Limit Scale: 0 # INFO: 70136 ns Physical Slot Number: 0 # INFO: 70136 ns # INFO: 70280 ns RP PCI Express Link Status Register (1011): # INFO: 70280 ns Negotiated Link Width: x1 # INFO: 70280 ns Slot Clock Config: System Reference Clock Used # INFO: 70965 ns RP LTSSM State: RECOVERY.RCVRLOCK # INFO: 71829 ns EP LTSSM State: RECOVERY.RCVRLOCK # INFO: 72629 ns EP LTSSM State: RECOVERY.RCVRCFG # INFO: 73525 ns RP LTSSM State: RECOVERY.RCVRCFG # INFO: 75733 ns RP LTSSM State: RECOVERY.SPEED # INFO: 76021 ns EP LTSSM State: RECOVERY.SPEED # INFO: 78797 ns EP LTSSM State: RECOVERY.RCVRLOCK # INFO: 79149 ns RP LTSSM State: RECOVERY.RCVRLOCK # INFO: 79181 ns RP LTSSM State: REC_EQULZ.PHASE0 # INFO: 79209 ns RP LTSSM State: REC_EQULZ.PHASE1 # INFO: 79573 ns EP LTSSM State: REC_EQULZ.PHASE0 # INFO: 80101 ns EP LTSSM State: REC_EQULZ.PHASE1 # INFO: 80345 ns RP LTSSM State: REC_EQULZ.DONE # INFO: 80365 ns RP LTSSM State: RECOVERY.RCVRLOCK # INFO: 80661 ns EP LTSSM State: REC_EQULZ.DONE # INFO: 80693 ns EP LTSSM State: RECOVERY.RCVRLOCK # INFO: 80885 ns EP LTSSM State: RECOVERY.RCVRCFG # INFO: 81017 ns RP LTSSM State: RECOVERY.RCVRCFG # INFO: 81373 ns RP LTSSM State: RECOVERY.IDLE # INFO: 81541 ns EP LTSSM State: RECOVERY.IDLE # INFO: 81637 ns EP LTSSM State: L0 # INFO: 81761 ns RP LTSSM State: L0 # INFO: 84552 ns New Link Speed: 8.0GT/s # INFO: 84552 ns # INFO: 84624 ns RP PCI Express Link Control Register (0040): # INFO: 84624 ns Common Clock Config: System Reference Clock Used # INFO: 84624 ns # INFO: 86776 ns # INFO: 86776 ns RP PCI Express Capabilities Register (0042): # INFO: 86776 ns Capability Version: 2 # INFO: 86776 ns Port Type: Root Port # INFO: 86776 ns # INFO: 86776 ns RP PCI Express Device Capabilities Register (10008003): # INFO: 86776 ns Max Payload Supported: 1KBytes # INFO: 86776 ns Extended Tag: Not Supported # INFO: 86776 ns Acceptable L0s Latency: Less Than 64 ns # INFO: 86776 ns Acceptable L1 Latency: Less Than 1 us # INFO: 86776 ns Attention Button: Not Present # INFO: 86776 ns Attention Indicator: Not Present # INFO: 86776 ns Power Indicator: Not Present # INFO: 86776 ns # INFO: 86776 ns RP PCI Express Link Capabilities Register (01606483): # INFO: 86776 ns Maximum Link Width: x8 # INFO: 86776 ns Supported Link Speed: 8.0GT/s or 5.0GT/s or 2.5GT/s # INFO: 86776 ns L0s Entry: Supported # INFO: 86776 ns L1 Entry: Not Supported # INFO: 86776 ns L0s Exit Latency: 2 us to 4 us # INFO: 86776 ns L1 Exit Latency: Less Than 1 us # INFO: 86776 ns Port Number: 01 # INFO: 86776 ns Surprise Dwn Err Report: Not Supported # INFO: 86776 ns DLL Link Active Report: Not Supported # INFO: 86776 ns # INFO: 86776 ns RP PCI Express Device Capabilities 2 Register (0010001F): # INFO: 86776 ns Completion Timeout Rnge: ABCD (50us to 64s) # INFO: 86904 ns # INFO: 86904 ns RP PCI Express Device Control Register (5070): # INFO: 86904 ns Error Reporting Enables: 0 # INFO: 86904 ns Relaxed Ordering: Enabled # INFO: 86904 ns Max Payload: 1KBytes # INFO: 86904 ns Extended Tag: Disabled # INFO: 86904 ns Max Read Request: 4KBytes # INFO: 86904 ns # INFO: 86904 ns RP PCI Express Device Status Register (0000): # INFO: 86904 ns # INFO: 86976 ns RP PCI Express Virtual Channel Capability: # INFO: 86976 ns Virtual Channel: 1 # INFO: 86976 ns Low Priority VC: 0 # INFO: 86976 ns # INFO: 86976 ns # INFO: 86976 ns CONFIGURING THE ROOT PORT AND ENDPOINT CONFIGURATION SPACES # INFO: 86976 ns --------------------------------------------------------- # INFO: 86976 ns Clearing the last bit of the ROMBAR which is the enable bit... # INFO: 88720 ns ----------------------------------------------------------- # INFO: 88720 ns Data in Header Type Field configuration register is (0) # INFO: 88720 ns (0) indicates a non-bridge function and a single function device. # INFO: 88720 ns ----------------------------------------------------------- # INFO: 88720 ns # INFO: 88720 ns # INFO: 88720 ns Starting write/reads to/from configuration registers to determine the sizes of the BARs. # INFO: 88720 ns Writing to configuration registers... # INFO: 88720 ns ----------------------------------------------------------- # INFO: 88720 ns maxbar = 9 and rombar = 12 # INFO: 90504 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFC0) # INFO: 90504 ns to configuration register address (10) # INFO: 92240 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFC4) # INFO: 92240 ns to configuration register address (14) # INFO: 93992 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFC8) # INFO: 93992 ns to configuration register address (18) # INFO: 95752 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFCC) # INFO: 95752 ns to configuration register address (1C) # INFO: 97488 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFD0) # INFO: 97488 ns to configuration register address (20) # INFO: 99240 ns Writing (FFFFFFFF) from BFM shared memory address (001FFFD4) # INFO: 99240 ns to configuration register address (24) # INFO: 100968 ns Writing (FFFFFFFE) from BFM shared memory addr (001FFFD8) # INFO: 100968 ns to configuration register address (30) # INFO: 100968 ns ----------------------------------------------------------- # INFO: 100968 ns # INFO: 100968 ns Reading from configuration registers... # INFO: 100968 ns ----------------------------------------------------------- # INFO: 102728 ns Data @ configuration register address (10) is (F000000C) # INFO: 104432 ns Data @ configuration register address (14) is (FFFFFFFF) # INFO: 106184 ns Data @ configuration register address (18) is (FFFFFC00) # INFO: 107912 ns Data @ configuration register address (1C) is (00000000) # INFO: 109648 ns Data @ configuration register address (20) is (00000000) # INFO: 111464 ns Data @ configuration register address (24) is (00000000) # INFO: 113256 ns Data @ configuration register address (30) is (00000000) # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns Loading each bar into the local BAR array # INFO: 113256 ns and finding the Least Significant Writable Bit (LSWB) in each BAR # INFO: 113256 ns # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns BAR # 0 = 64-bit BAR # INFO: 113256 ns BAR # 1 LSWB = 64 # INFO: 113256 ns Finding the LSWB for BAR # 0 # INFO: 113256 ns BAR # 0 LSWB = 28 # INFO: 113256 ns BAR # 2 is a 32-bit BAR # INFO: 113256 ns Finding the LSWB for BAR # 2 # INFO: 113256 ns BAR # 2 LSWB = 10 # INFO: 113256 ns BAR # 3 does not exist. # INFO: 113256 ns BAR # 4 does not exist. # INFO: 113256 ns BAR # 5 does not exist. # INFO: 113256 ns BAR # 6 does not exist. # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns Sorting the BARS in order from smallest to largest # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns 1st BAR = BAR # 2 # INFO: 113256 ns 2nd BAR = BAR # 0 # INFO: 113256 ns 3rd BAR = BAR # 1 # INFO: 113256 ns 4th BAR = BAR # 3 # INFO: 113256 ns 5th BAR = BAR # 4 # INFO: 113256 ns 6th BAR = BAR # 5 # INFO: 113256 ns 7th BAR = BAR # 6 # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns I/O BARs: Determine the size of the I/O block required and set the start address # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns Completed: The rest of the BARs are not I/O BARS # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns 32-bit Non-Prefetchable BARs: Determine size of the memory required and the start address # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns BAR # 2 sized. # INFO: 113256 ns Completed: The rest of the BARs are not 32-bit prefetchable. # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns 32-bit Prefetchable BARs (and 64-bit Prefetchable BARs if addr_map_4GB_limit is set): # INFO: 113256 ns determining size of the memory required and the start address # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns Completed: The rest of the BARs are not 32-bit prefetchable # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns 64-bit Prefetchable BARs, Smallest to Largest, if addr_map_4GB_limit is not set: # INFO: 113256 ns determining size of the memory required and the start address # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns BAR # 0 sized. # INFO: 113256 ns Completed: The rest of the BARs are not 64-bit prefetchable # INFO: 113256 ns ----------------------------------------------------------- # INFO: 113256 ns # INFO: 113256 ns Now put all of the BAR address locations back into BFM shared memory... # INFO: 113256 ns # INFO: 113256 ns # INFO: 113256 ns BAR Address Assignments: # INFO: 113256 ns BAR Size Assigned Address Type # INFO: 113256 ns --- ---- ---------------- # INFO: 113256 ns BAR1:0 256 MBytes 00000000 80000000 Prefetchable # INFO: 113256 ns BAR2 1 KBytes 00200000 Non-Prefetchable # INFO: 113256 ns BAR3 Disabled # INFO: 113256 ns BAR4 Disabled # INFO: 113256 ns BAR5 Disabled # INFO: 113256 ns ExpROM Disabled # INFO: 115496 ns # INFO: 115496 ns COMPLETED CONFIGURATION OF THE ENDPOINT BARS # INFO: 115496 ns --------------------------------------------------------- # INFO: 115496 ns # INFO: 117528 ns BEGINNING CONFIGURATION REGISTER READS/WRITES # INFO: 117528 ns --------------------------------------------------------- # INFO: 119280 ns --------------------------------------------------------- # INFO: 119280 ns EP PCI Express Link Capabilities Register contents: (01406413): # INFO: 119280 ns --------------------------------------------------------- # INFO: 121072 ns --------------------------------------------------------- # INFO: 121072 ns EP PCI Express Link Status Register contents: (1013): # INFO: 121072 ns --------------------------------------------------------- # INFO: 122840 ns --------------------------------------------------------- # INFO: 122840 ns Original EP PCI Express Link Control Register contents: (0000): # INFO: 122840 ns --------------------------------------------------------- # INFO: 122840 ns --------------------------------------------------------- # INFO: 122840 ns Writing a '1' to the Retain Link bit (bit 5) of the Link Control Register # INFO: 123461 ns RP LTSSM State: RECOVERY.RCVRLOCK # INFO: 123949 ns EP LTSSM State: RECOVERY.RCVRLOCK # INFO: 124133 ns EP LTSSM State: RECOVERY.RCVRCFG # INFO: 124321 ns RP LTSSM State: RECOVERY.RCVRCFG # INFO: 124645 ns RP LTSSM State: RECOVERY.IDLE # INFO: 124845 ns EP LTSSM State: RECOVERY.IDLE # INFO: 124909 ns EP LTSSM State: L0 # INFO: 125069 ns RP LTSSM State: L0 # INFO: 126872 ns --------------------------------------------------------- # INFO: 126872 ns # INFO: 126872 ns COMPLETED CONFIGURATION REGISTER READS/WRITES # INFO: 126872 ns --------------------------------------------------------- # INFO: 126872 ns # INFO: 126872 ns BEGINNING DOWNSTREAM MEMORY READS/WRITES # INFO: 126872 ns --------------------------------------------------------- # INFO: 126872 ns # INFO: 126872 ns # INFO: 126872 ns Writing (22221111) to BAR #0 with address (001FFFC0) # INFO: 128840 ns Read (22221111) from BAR #0 with address (001FFFC0) # INFO: 128840 ns # INFO: 128840 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840 # INFO: 128840 ns # INFO: 128840 ns COMPLETED DOWNSTREAM MEMORY READS/WRITES # INFO: 128840 ns --------------------------------------------------------- # INFO: 128840 ns # SUCCESS: Simulation stopped due to successful completion!