
Design Space Explorer Report
-------------------------------------------------------------------------------

+------------------------------------------------------------------------+
| Report Information                                                     |
+------------------------------------------------------------------------+
+--------------------+-----------------------------------------------------------------------------+
| Start Date & Time  | Tue Aug 05 13:58:39 PDT 2014                                                |
| Working Directory  | /data/kichan/Builds/14.0/b200/av_x4_g2_ast128_5AGTFD7K3F40I3_g2_x4_restored |
| Project Name       | top                                                                         |
| Revision Name      | top                                                                         |
| Quartus II Version | Version 14.0.0 Build 200 06/17/2014 SJ Full Version                         |
+--------------------+-----------------------------------------------------------------------------+

Table of Contents
    Report Information
    Legal Notice
    Flow Messages
    Flow Summary

+-----------------------------------------------------------------------------+
| Legal Notice                                                                |
+-----------------------------------------------------------------------------+
Copyright (C) 1991-2014 Altera Corporation. All rights reserved.. All rights reserved.
Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
support information,  device programming or simulation file,  and any other
associated  documentation or information  provided by  Altera  or a partner
under  Altera's   Megafunction   Partnership   Program  may  be  used  only
to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
other  use  of such  megafunction  design,  netlist,  support  information,
device programming or simulation file,  or any other  related documentation
or information  is prohibited  for  any  other purpose,  including, but not
limited to  modification,  reverse engineering,  de-compiling, or use  with
any other  silicon devices,  unless such use is  explicitly  licensed under
a separate agreement with  Altera  or a megafunction partner.  Title to the
intellectual property,  including patents,  copyrights,  trademarks,  trade
secrets,  or maskworks,  embodied in any such megafunction design, netlist,
support  information,  device programming or simulation file,  or any other
related documentation or information provided by  Altera  or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.

+-----------------------------------------------------------------------------+
| Flow Messages                                                               |
+-----------------------------------------------------------------------------+

Info: Loading space: Selective Performance Optimization Space
Info: Loading space: Seeds
Info: Design space contains 14 points

+-----------------------------------------------------------------------------+
| Settings for base                                                           |
+-----------------------------------------------------------------------------+
+----------------------------------------------+--------------+
| Setting                                      | Value        |
+----------------------------------------------+--------------+
| ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO         |
| PHYSICAL_SYNTHESIS_REGISTER_RETIMING         | ON           |
| PLACEMENT_EFFORT_MULTIPLIER                  | 1.0          |
| ROUTER_TIMING_OPTIMIZATION_LEVEL             | NORMAL       |
| PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION      | ON           |
| SEED                                         | 7            |
| PHYSICAL_SYNTHESIS_COMBO_LOGIC               | ON           |
| PRE_MAPPING_RESYNTHESIS                      | OFF          |
| ENABLE_BENEFICIAL_SKEW_OPTIMIZATION          | ON           |
| PHYSICAL_SYNTHESIS_EFFORT                    | EXTRA        |
| FITTER_EFFORT                                | STANDARD FIT |
+----------------------------------------------+--------------+


+-------------------------------------------------------------------------------+
| QSF Setting                                                                   |
+-------------------------------------------------------------------------------+
| set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION AUTO |
| set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON           |
| set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0                   |
| set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL NORMAL           |
| set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON        |
| set_global_assignment -name SEED 7                                            |
| set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON                 |
| set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF                       |
| set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION ON            |
| set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA                   |
| set_global assignment -name FITTER_EFFORT "STANDARD FIT"                      |
+-------------------------------------------------------------------------------+

Info: Compiling revision top
Info: Halting exploration
Warning: No results from base compilation were recorded

+-----------------------------------------------------------------------------+
| Results for base                                                            |
+-----------------------------------------------------------------------------+
+--+--+
+--+--+


+-----------------------------------------------------------------------------+
| Detailed Cumulative Results                                                 |
+-----------------------------------------------------------------------------+
+-------+
| Point |
+-------+
| base  |
+-------+

Info: Restoring base settings at end of flow

+-----------------------------------------------------------------------------+
| Flow Summary                                                                |
+-----------------------------------------------------------------------------+

+-----------------------------------------------------------------------------+
| Detailed Results                                                            |
+-----------------------------------------------------------------------------+
+-------+
| Point |
+-------+
| base  |
+-------+


+-----------------------------------------------------------------------------+
| Results for Base                                                            |
+-----------------------------------------------------------------------------+
+--+--+
+--+--+

Info: Best results were your base results
Warning: No base results available -- skipping signature table printing

+-----------------------------------------------------------------------------+
| Circuit Signature Compile Groups                                            |
+-----------------------------------------------------------------------------+
+------------+---------------+----------------+
| Group Name | Group Members | Group Settings |
+------------+---------------+----------------+

Info: Exploration has finished. 0 errors, 2 warnings
Info: Exploration ended: Tue Aug 05 14:01:12 PDT 2014
Info: Elapsed time: 00:02:32
