Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA).
Linux: | -fsycl-link[=value] |
Windows: | -fsycl-link[=value] |
value |
Can be one of the following:
image takes much longer to generate than does early. |
OFF |
No partial link of device binaries is performed. |
This option tells the compiler to perform a partial link of device binaries to be used with FPGA.
This partial link is then wrapped by the offload wrapper, allowing the device binaries to be linked by the host compiler or linker.
If you do not specify a value, the following occurs:
When used with just -fsycl (-fsycl -fsycl-link), the driver will generate a host linkable device object.
When also used with -fintelfpga (-fsycl -fintelfpga -fsycl-link), the behavior is the same as specifying -fsycl-link=early.
When using the icx/icpx compiler driver for this option, you must also specify option -fsycl.
When using the dpcpp compiler driver, option -fsycl is implied by default.
When SYCL offloading is enabled, this option only applies to device-specific compilation.
Visual Studio: Linker > General > Generate partially linked device object to be used with the host link
Eclipse: Linker > General > Generate partially linked device object to be used with the host link
None