# Code Generation Options

This section contains descriptions for compiler options that pertain to code generation.

Parent topic: Compiler Option Details

- arch
  Tells the compiler which features it may target, including which instruction sets it may generate.
- EH
  Specifies the model of exception handling to be performed.
- fasynchronous-unwind-tables
  Determines whether unwind information is precise at an instruction boundary or at a call boundary.
- fexceptions
  Enables exception handling table generation.
- fomit-frame-pointer, Oy
  Determines whether EBP is used as a general-purpose register in optimizations.
- Gd
  Makes __cdecl the default calling convention.
- Gr
  Makes __fastcall the default calling convention. This content is specific to C++; it does not apply to DPC++.
- GR
  Enables or disables C++ Run Time Type Information (RTTI).
- guard
  Enables the control flow protection mechanism.
- Gv
  Tells the compiler to use the vector calling convention (__vectorcall) when passing vector type arguments.
- Gz
  Makes __stdcall the default calling convention. This content is specific to C++; it does not apply to DPC++.
- m
  Tells the compiler which features it may target, including which instruction set architecture (ISA) it may generate.
- m32, m64, Qm32, Qm64
  Tells the compiler to generate code for a specific architecture.
- m80387
  Specifies whether the compiler can use x87 instructions.
- march
  Tells the compiler to generate code for processors that support certain features.
- masm
  Tells the compiler to generate the assembler output file using a selected dialect.
- mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries
  Tells the compiler to align branches and fused branches on 32-byte boundaries for better performance. This content is specific to C++; it does not apply to DPC++.
- mconditional-branch, Qconditional-branch
  Lets you identify and fix code that may be vulnerable to speculative execution side-channel attacks, which can leak your secure data as a result of bad speculation of a conditional branch direction. This content is specific to C++; it does not apply to DPC++.
- mintrinsic-promote, Qintrinsic-promote
  Enables functions containing calls to intrinsics that require a specific CPU feature to have their target architecture automatically promoted to allow the required feature.
- momit-leaf-frame-pointer
  Determines whether the frame pointer is omitted or kept in leaf functions.
- mregparm
  Lets you control the number registers used to pass integer arguments. This content is specific to C++; it does not apply to DPC++.
- mtune, tune
  Performs optimizations for specific processors but does not cause extended instruction sets to be used (unlike -march).
- Qcxx-features
  Enables standard C++ features without disabling Microsoft* features.
- Qpatchable-addresses
  Tells the compiler to generate code such that references to statically assigned addresses can be patched.
- Qsafeseh
  Registers exception handlers for safe exception handling. This content is specific to C++; it does not apply to DPC++.
- regcall, Qregcall
  Tells the compiler that the __regcall calling convention should be used for functions that do not directly specify a calling convention.
- x, Qx
  Tells the compiler which processor features it may target, including which instruction sets and optimizations it may generate.
- xHost, QxHost
  Tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.