# Cacheability Support Intrinsic

The prototype for this Intel® Streaming SIMD Extensions (Intel® SSE4) intrinsic is in the smmintrin.h file.

To use this intrinsic, include the immintrin.h file as follows:

    #include <immintrin.h>

## _mm_stream_load_si128

extern __m128i _mm_stream_load_si128(__m128i* v1);

Loads `__m128` data from a 16-byte aligned address, v1, to the destination operand, `m128i` without polluting the caches.

Corresponding instruction: `MOVNTDQA`

Parent topic: Vectorizing Compiler and Media Accelerators