# _mm256_shufflehi_epi16

Shuffles the upper 4 high signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The low qwords in each of 2 128-bit lanes of the source operand are copied to the corresponding low qwords of the result value. The corresponding Intel® AVX 2 instruction is VPSHUFHW.

## Syntax

extern __m256i _mm256_shufflehi_epi16(__m256i val, const int control);

## Arguments

val | integer source operand
control | immediate control mask

## Description

Shuffles the upper four high signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The low qwords in each of two 128-bit lanes of the source operand are copied to the corresponding low qwords of the result value. The shuffle control operand must be an immediate.

Below is the pseudo-code for the intrinsic:

    RESULT[63:0] <- VAL[63:0]
    RESULT[79:64] <- (VAL >> (CONTROL[1:0] *16))[79:64]
    RESULT[95:80] <- (VAL >> (CONTROL[3:2] * 16))[79:64]
    RESULT[111:96] <- (VAL >> (CONTROL[5:4] * 16))[79:64]
    RESULT[127:112] <- (VAL >> (CONTROL[7:6] * 16))[79:64]
    RESULT[191:128] <- VAL[191:128]
    RESULT[207192] <- (VAL >> (CONTROL[1:0] *16))[207:192]
    RESULT[223:208] <- (VAL >> (CONTROL[3:2] * 16))[207:192]
    RESULT[239:224] <- (VAL >> (CONTROL[5:4] * 16))[207:192]

    RESULT[255:240] <- (VAL >> (CONTROL[7:6] * 16))[207:192]

## Returns

Result of the shuffle operation.

Parent topic: Intrinsics for Shuffle Operations