# Intrinsics for Shuffle Operations

Parent topic: Intrinsics for Intel® Advanced Vector Extensions 2 (Intel® AVX2)

- _mm256_shuffle_epi8
  Shuffles bytes in the first source vector according to the shuffle control mask in the second source vector. The corresponding Intel® AVX2 instruction is VPSHUFB.
- _mm256_shuffle_epi32
  Conditionally shuffles doublewords of the source vector in the destination vector at the locations selected with the immediate control operand. The corresponding Intel® AVX2 instruction is VPSHUFD.
- _mm256_shufflehi_epi16
  Shuffles the upper 4 high signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The low qwords in each of 2 128-bit lanes of the source operand are copied to the corresponding low qwords of the result value. The corresponding Intel® AVX 2 instruction is VPSHUFHW.
- _mm256_shufflelo_epi16
  Shuffles the low 4 signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The high qwords in each of 2 128-bit lanes of the source operand are copied to the corresponding high qwords of the result value. The corresponding Intel® AVX 2 instruction is VPSHUFLW.