# Intrinsics for Masked Load/Store Operations

Parent topic: Intrinsics for Intel® Advanced Vector Extensions 2 (Intel® AVX2)

- _mm_maskload_epi32/64, _mm256_maskload_epi32/64
  Conditionally loads dwords/qwords from the specified memory location, depending on the mask bits associated with each data element. The corresponding Intel® AVX2 instruction is VPMASKMOVD or VPMASKMOVQ.
- _mm_maskstore_epi32/64, _mm256_maskstore_epi32/64
  Conditionally stores dwords/qwords from the source vector to the specified memory location, depending on the given mask bits associated with each data element. The corresponding Intel® AVX2 instruction is VPMASKMOVD or VPMASKMOVQ.