# _tile_stream_loadd

## Synopsis

    void _tile_stream_loadd (__tile dst, const void * base, int stride)

Type | Value
--- | ---
Type | Tile
Header file | `#include <immintrin.h>`
Instruction | `TILELOADDT1 tmm, sibmem`
CPUID flags | `AMXTILE`

## Description

Load tile rows from memory specifieid by "base" address and "stride" into destination tile "dst" using the tile configuration previously configured via "_tile_loadconfig". This intrinsic provides a hint to the implementation that the data will likely not be reused in the near future and the data caching can be optimized accordingly.

## Technology

AMX

## Category

Application-Targeted

## Operation

    start := tileconfig.startRow
    IF start == 0 // not restarting, zero incoming state
    	tilezero(dst)
    FI

    nbytes := dst.colsb
    DO WHILE start < dst.rows
    	memptr := base + start * stride
    	write_row_and_zero(dst, start, read_memory(memptr, nbytes), nbytes)
    	start := start + 1
    OD

    zero_upper_rows(dst, dst.rows)
    zero_tileconfig_start()

Parent topic: Intrinsics for Intel® Advanced Matrix Extensions AMX-TILE Instructions