# Intrinsics for Load and Store Operations

Parent topic: Intrinsics for Intel® Advanced Vector Extensions

- _mm256_broadcast_pd
  Loads and broadcasts packed double-precision floating point values.The corresponding Intel® AVX instruction is VBROADCASTF128.
- _mm256_broadcast_ps
  Loads and broadcasts packed single-precision floating point values. The corresponding Intel® AVX instruction is VBROADCASTF128.
- _mm256_broadcast_sd
  Loads and broadcasts scalar double-precision floating point values to a 256-bit destination operand. The corresponding Intel® AVX instruction is VBROADCASTSD.
- _mm256_broadcast_ss, _mm_broadcast_ss
  Loads and broadcasts 256/128-bit scalar single-precision floating point values to a 256/128-bit destination operand. The corresponding Intel® AVX instruction is VBROADCASTSS.
- _mm256_load_pd
  Moves packed double-precision floating point values from aligned memory location to a destination vector. The corresponding Intel® AVX instruction isVMOVAPD.
- _mm256_load_ps
  Moves packed single-precision floating point values from aligned memory location to a destination vector. The corresponding Intel® AVX instruction isVMOVAPS.
- _mm256_load_si256
  Moves integer values from aligned memory location to a destination vector. The corresponding Intel® AVX instruction isVMOVDQA.
- _mm256_loadu_pd
  Moves packed double-precision floating point values from unaligned memory location to a destination vector. The corresponding Intel® AVX instruction is VMOVUPD.
- _mm256_loadu_ps
  Moves packed single-precision floating point values from unaligned memory location to a destination vector. The corresponding Intel® AVX instruction isVMOVUPS.
- _mm256_loadu_si256
  Moves integer values from unaligned memory location to a destination vector. The corresponding Intel® AVX instruction isVMOVDQU.
- _mm256_maskload_pd, _mm_maskload_pd
  Loads packed double-precision floating point values according to mask values. The corresponding Intel® AVX instruction is VMASKMOVPD.
- _mm256_maskload_ps, _mm_maskload_ps
  Loads packed single-precision floating point values according to mask values. The corresponding Intel® AVX instruction is VMASKMOVPS.
- _mm256_store_pd
  Moves packed double-precision floating point values from a float64 vector to an aligned memory location. The corresponding Intel® AVX instruction isVMOVAPD.
- _mm256_store_ps
  Moves packed single-precision floating point values from a float32 vector to an aligned memory location. The corresponding Intel® AVX instruction isVMOVAPS.
- _mm256_store_si256
  Moves values from a integer vector to an aligned memory location. The corresponding Intel® AVX instruction is VMOVDQA.
- _mm256_storeu_pd
  Moves packed double-precision floating point values from a float64 vector to an unaligned memory location. The corresponding Intel® AVX instruction isVMOVUPD.
- _mm256_storeu_ps
  Moves packed single-precision floating point values from a float32 vector to an unaligned memory location. The corresponding Intel® AVX instruction isVMOVUPS.
- _mm256_storeu_si256
  Moves values from a integer vector to an unaligned memory location. The corresponding Intel® AVX instruction is VMOVDQU.
- _mm256_stream_pd
  Moves packed double-precision floating-point values using non-temporal hint. The corresponding Intel® AVX instruction is VMOVNTPD.
- _mm256_stream_ps
  Moves packed single-precision floating-point values using non-temporal hint. The corresponding Intel® AVX instruction is VMOVNTPS.
- _mm256_stream_si256
  Moves packed integer values using non-temporal hint. The corresponding Intel® AVX instruction is VMOVNTDQ.
- _mm256_maskstore_pd, _mm_maskstore_pd
  Stores packed double-precision floating point values according to mask values. The corresponding Intel® AVX instruction is VMASKMOVPD.
- _mm256_maskstore_ps, _mm_maskstore_ps
  Stores packed single-precision floating point values according to mask values. The corresponding Intel® AVX instruction is VMASKMOVPS.