# Store Intrinsics

Intel® Streaming SIMD Extensions 2 (Intel® SSE2) intrinsics for floating-point store operations are listed in this topic. The prototypes for Intel® SSE2 intrinsics are in the emmintrin.h header file.

To use these intrinsics, include the immintrin.h file as follows:

    #include <immintrin.h>

The store operations assign the initialized data to the address.

The detailed description of each intrinsic contains a table detailing the returns. In these tables, dp[n] is an access to the n element of the result.

Intrinsic Name | Operation | Corresponding Intel® SSE2 Instruction
--- | --- | ---
_mm_stream_pd | Store | MOVNTPD
_mm_store_sd | Store | MOVSD
_mm_store1_pd | Store | MOVAPD + shuffling
_mm_store_pd | Store | MOVAPD
_mm_storeu_pd | Store | MOVUPD
_mm_storer_pd | Store | MOVAPD + shuffling
_mm_storeh_pd | Store | MOVHPD
_mm_storel_pd | Store | MOVLPD

## _mm_store_sd

void _mm_store_sd(double *dp, __m128d a);

Stores the lower DP FP value of a. The address dp needs not be 16-byte aligned.

*dp
a0

## _mm_store1_pd

void _mm_store1_pd(double *dp, __m128d a);

Stores the lower DP FP value of a twice. The address dp must be 16-byte aligned.

dp[0] | dp[1]
--- | ---
a0 | a0

## _mm_store_pd

void _mm_store_pd(double *dp, __m128d a);

Stores two DP FP values. The address dp must be 16-byte aligned.

dp[0] | dp[1]
--- | ---
a0 | a1

## _mm_storeu_pd

void _mm_storeu_pd(double *dp, __m128d a);

Stores two DP FP values. The address dp need not be 16-byte aligned.

dp[0] | dp[1]
--- | ---
a0 | a1

## _mm_storer_pd

void _mm_storer_pd(double *dp, __m128d a);

Stores two DP FP values in reverse order. The address dp must be 16-byte aligned.

dp[0] | dp[1]
--- | ---
a1 | a0

## _mm_storeh_pd

void _mm_storeh_pd(double *dp, __m128d a);

Stores the upper DP FP value of a.

*dp
a1

void _mm_storel_pd(double *dp, __m128d a);

Stores the lower DP FP value of a.

*dp
a0

Parent topic: Floating-point Intrinsics