# Intrinsics for Intel® Advanced Vector Extensions

Intel® Advanced Vector Extensions (Intel® AVX) intrinsics are assembly-coded functions that call on Intel® AVX instructions, which are new vector SIMD instruction extensions for IA-32 and Intel® 64 architectures. Intel® AVX intrinsics are architecturally similar to Intel® Streaming SIMD Extensions (Intel® SSE) and double-precision floating-point portions of Intel® Streaming SIMD Extensions 2 (Intel® SSE2).

To use these intrinsics, include the immintrin.h file as follows:

    #include <immintrin.h>

Intel® AVX intrinsics introduce 256-bit vector processing capability, and are supported on IA-32 and Intel® 64 architectures built from 32nm process technology and beyond. They map directly to Intel® AVX new instructions and other enhanced 128-bit SIMD instructions.

The first generation Intel® AVX provides 256-bit SIMD register support, 256-bit vector floating-point instructions, enhancements to 128-bit SIMD instructions, and support for three and four operand syntax.

## Functional Overview

Intel® AVX provides comprehensive functional improvements over previous generations of SIMD instruction extensions. The functional improvements include:

- 256-bit floating-point arithmetic primitives: Intel® AVX enhances existing 128-bit floating-point arithmetic instructions with 256-bit capabilities for floating-point processing.
- Enhancements for flexible SIMD data movements: Intel® AVX provides a number of new data movement primitives to enable efficient SIMD programming in relation to loading non-unit-strided data into SIMD registers, intra-register SIMD data manipulation, conditional expression and branch handling, etc. Enhancements for SIMD data movement primitives cover 256-bit and 128-bit vector floating-point data, and across 128-bit integer SIMD data processing using VEX-encoded instructions.

Parent topic: Intrinsics

- Details of Intel® Advanced Vector Extensions Intrinsics
- Intrinsics for Arithmetic Operations
- Intrinsics for Bitwise Operations
- Intrinsics for Blend and Conditional Merge Operations
- Intrinsics for Compare Operations
- Intrinsics for Conversion Operations
- Intrinsics to Determine Minimum and Maximum Values
- Intrinsics for Load and Store Operations
- Intrinsics for Miscellaneous Operations
- Intrinsics for Packed Test Operations
- Intrinsics for Permute Operations
- Intrinsics for Shuffle Operations
- Intrinsics for Unpack and Interleave Operations
- Support Intrinsics for Vector Typecasting Operations
- Intrinsics Generating Vectors of Undefined Values

## See Also

Instruction Set Architecture (ISA) site at https://software.intel.com/en-us/isa-extensions
Details about the Intel® AVX Intrinsics