# Intrinsics for Miscellaneous Operations

Parent topic: Intrinsics for Intel® Advanced Vector Extensions

- _mm256_extractf128_pd
  Extracts 128-bit packed float64 values. The corresponding Intel® AVX instruction is VEXTRACTF128.
- _mm256_extractf128_ps
  Extracts 128-bit float32 values. The corresponding Intel® AVX instruction is VEXTRACTF128.
- _mm256_extractf128_si256
  Extracts 128-bit scalar integer values. The corresponding Intel® AVX instruction is VEXTRACTF128.
- _mm256_insertf128_pd
  Inserts 128 bits of packed float64 values. The corresponding Intel® AVX instruction is VINSERTF128.
- _mm256_insertf128_ps
  Inserts 128 bits of packed float32 values. The corresponding Intel® AVX instruction is VINSERTF128.
- _mm256_insertf128_si256
  Inserts 128 bits of packed scalar integer values . The corresponding Intel® AVX instruction is VINSERTF128.
- _mm256_lddqu_si256
  Moves unaligned integer from memory. The corresponding Intel® AVX instruction is VLDDQU.
- _mm256_movedup_pd
  Duplicates even-indexed double-precision floating point values. The corresponding Intel® AVX instruction is VMOVDDUP.
- _mm256_movehdup_ps
  Duplicates odd-indexed single-precision floating point values. The corresponding Intel® AVX instruction is VMOVSHDUP.
- _mm256_moveldup_ps
  Duplicates even-indexed single-precision floating point values. The corresponding Intel® AVX instruction is VMOVSLDUP.
- _mm256_movemask_pd
  Extracts float64 sign mask. The corresponding Intel® AVX instruction is VMOVMSKPD.
- _mm256_movemask_ps
  Extracts float32 sign mask. The corresponding Intel® AVX instruction is VMOVMSKPS.
- _mm256_round_pd
  Rounds off double-precision floating point values to nearest upper/lower integer depending on rounding mode. The corresponding Intel® AVX instruction isVROUNDPD.
- _mm256_round_ps
  Rounds off single-precision floating point values to nearest upper/lower integer depending on rounding mode. The corresponding Intel® AVX instruction isVROUNDPS.
- _mm256_set_pd
  Initializes 256-bit vector with float64 values. No corresponding Intel® AVX instruction.
- _mm256_set_ps
  Initializes 256-bit vector with float32 values. No corresponding Intel® AVX instruction.
- _mm256_set_epi8/16/32/64x
  Initializes 256-bit vector with integer values. No corresponding Intel® AVX instruction.
- _mm256_setr_pd
  Initializes 256-bit vector with float64 values in reverse of specified order. No corresponding Intel® AVX instruction.
- _mm256_setr_ps
  Initializes 256-bit vector with float32 values in reverse of specified order. No corresponding Intel® AVX instruction.
- _mm256_setr_epi32
  Initializes 256-bit vector with integer values in reverse of specified order. No corresponding Intel® AVX instruction.
- _mm256_set1_pd
  Initializes 256-bit vector with scalar double-precision floating point values. No corresponding Intel® AVX instruction.
- _mm256_set1_ps
  Initializes 256-bit vector with scalar single-precision floating point values. No corresponding Intel® AVX instruction.
- _mm256_set1_epi32
  Initializes 256-bit vector with scalar integer values. No corresponding Intel® AVX instruction.
- _mm256_setzero_pd
  Sets float64 YMM registers to zero. No corresponding Intel® AVX instruction.
- _mm256_setzero_ps
  Sets float32 YMM registers to zero. No corresponding Intel® AVX instruction.
- _mm256_setzero_si256
  Sets integer YMM registers to zero. No corresponding Intel® AVX instruction.
- _mm256_zeroall
  Zeroes all YMM registers. The corresponding Intel® AVX instruction is VZEROALL.
- _mm256_zeroupper
  Zeroes the upper bits of the YMM registers. The corresponding Intel® AVX instruction is VZEROUPPER.