adc_qsys |
|
2015.03.25.13:46:05 | Datasheet |
clk_50m | adc_qsys |
clk_adc_ref | |
master_0 | |
master | |
dac_ctrl | |
s1 | 0x00000010 |
modular_adc_0 | |
sequencer_csr | 0x00001000 |
sample_store_csr | 0x00001200 |
modular_adc_1 | |
sequencer_csr | 0x00002000 |
sample_store_csr | 0x00002200 |
product_info_0 | |
avalon_slave_0 | 0x00000000 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
|
clk_50m | clk | master_0 | |
clk | |||
clk_reset | |||
clk_reset | |||
master | product_info_0 | ||
avalon_slave_0 | |||
master | dac_ctrl | ||
s1 | |||
master | modular_adc_0 | ||
sample_store_csr | |||
master | |||
sequencer_csr | |||
master | modular_adc_1 | ||
sample_store_csr | |||
master | |||
sequencer_csr |
Parameters
|
Software Assignments(none) |
master_0 | master | modular_adc_0 |
sample_store_csr | ||
master | ||
sequencer_csr | ||
clk_adc_ref | clk | |
adc_pll_clock | ||
clk_reset | ||
reset_sink | ||
clk_50m | clk | |
clock | ||
clk_reset | ||
reset_sink |
Parameters
|
Software Assignments
|
master_0 | master | modular_adc_1 |
sample_store_csr | ||
master | ||
sequencer_csr | ||
clk_adc_ref | clk | |
adc_pll_clock | ||
clk_reset | ||
reset_sink | ||
clk_50m | clk | |
clock | ||
clk_reset | ||
reset_sink |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments(none) |
generation took 0.01 seconds | rendering took 0.05 seconds |