ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH 
WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH 
WILL BE UNINTERRUPTED OR ERROR-FREE. 

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quartus-10.0-1.191-readme.txt 
Readme file for Quartus II 10.0 SP1 Patch 1.191
Copyright (C) Altera Corporation 2010 All right reserved. 
Patch created on December 10 2010
Patch SPR#: 361227 
SPRs fixed: 361195
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Problem:  Arria II ALTMEMPHY Memory Interface IP captures data 
          from the memory device into DDIO input registers using 
          DQS.  Once the data is captured the data must be 
          resynchronized to a known clock domain using a 
          resynchronization register.  To obtain the highest 
          margin on this transfer a resynchronization register is 
          available in the periphery of the device near the DDIO 
          input registers, however, due to the reset states of the 
          DDIO input and resynchronization registers the 
          resynchronization register does not get placed in the 
          periphery but instead gets placed in the core reducing 
          resynchronization margin and possibly resulting in 
          failing read commands.

          The Quartus II Fitter places the resynchronization 
          register in the core because the ALTMEMPHY Memory 
          Interface IP chooses to reset the resynchronization 
          register to a logic-1 while the DDIO in register is 
          reset to a logic-0.  With the differences in the reset 
          state, the design is synthesized with an inverter before 
          and after the resynchronization register, and thus cannot 
          be placed in the periphery.


Solution:  The solution provided in the patch changes the reset 
           state of the resynchronization register to a logic-0 
           thus providing for both the resynchronization and DDIO 
           input registers to reset to the same value and thus no 
           inverter is synthesized between the two registers and the 
           Quartus II Fitter can place the resynchronization register 
           in the periphery.


Caution - You must either have previously installed the 
          Quartus II 10.0 SP1 software or must 
          install the Quartus II 10.0 SP1 software 
          before installing this patch. Otherwise, the patch will 
          not be installed correctly and the Quartus II 
          software will not run properly.