ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH WILL BE UNINTERRUPTED OR ERROR-FREE. //**************************************************************** quartusii-13.0sp1-1.dp1-readme.txt Readme file for Quartus II 13.0 SP1 Patch 1.dp1 Copyright (C) Altera Corporation 2013 All right reserved. Patch created on July 19 2013 Patch Case#: 139016 //**************************************************************** This patch addresses known software issues for Stratix V, Arria V, and Cyclone V devices in the Quartus II software version 13.0 SP1. You must either have previously installed the Quartus II 13.0 SP1 software or must install the Quartus II 13.0 SP1 software before installing this patch. Otherwise, the patch will not be installed correctly and the Quartus II software will not run properly. The device patches are cumulative. ============================================= The following issues are addressed in 1.dp1: ============================================= --------------------- Issue 1 (case 134991) --------------------- This patch fixes the following Internal Error: Internal Error: Sub-system:ASMCC, File:/quartus/comp/asmcc/asmcc_bitfield.cpp,Line:989 Assembler bitfield error: Found conflicting assignments for CRAM address:address=142 ppm select and cpri mode on native phy for AV & CV HSSI interface (pcs_pma_if and pld_pcs_if) --------------------- Issue 2 (case 135275) --------------------- This patch fixes a bug in 10GBASE-KR Link Training algorithm that mistakenly sets post-tap to minimum in certain high error rate conditions. You must regenerate your "1G/10GbE and 10GBASE-KR PHY" IP and recompile your design after installing this patch. --------------------- Issue 3 (case 130633) --------------------- This patch fixes the following Internal Error that happens when NIOS II plugin is used to add nodes into SignalTap II: Internal Error: Sub-system: SDR, File: /quartus/sld/sdr/sdr_tx_trigger_gen2.cpp, Line: 840 node_index < this->m_nodes_vec_cache.size() Stack Trace: 0x7202a: SDR_TX_TRIGGER_GEN2::set_node_alias(char const*, char const*) + 0xb6 (sld_sdr) --------------------- Issue 4 (case 137044) --------------------- This patch enables SOF file generation for all Cyclone V SoC HH120 production devices.