Bug ID: FB: 578734;

Unable to make preloader in Windows 10

Description

This issue comes when using SOC EDS tool to generate the preloader. After creating the new HPS and BSP settings file, make command is giving a failure:

tar zxf /cygdrive/c/intelFPGA/18.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz

tar: Error opening archive: Failed to open '/cygdrive/c/intelFPGA/18.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz'

make: *** [uboot-socfpga/.untar] Error 1

Workaround/Fix

In order to workaround this issue, two files need to be modifed before executing the make command.

 

1. C:\<installation_directory>\embedded\ip\altera\preloader\src\Makefile.template

Change the current file with the attached one in this link (make sure to unzip file before you copy)

 

2. C:\<installation_directory>\embedded\host_tools\cygwin\etc\fstabin 

 

in fstab file:comment this line:

#non /cygdrive cygdrive binary,posix=0,user 0 0

and add this line instead:

none /cygdrive cygdrive binary,posix=0,user,noacl 0 0

 

 

This issue is scheduled to be fixed in future release of Intel® Quartus Prime software.