Device Family: Intel® Arria® 10, Arria® V, Cyclone® V, Stratix® V

Intel Software: Quartus Prime

Type: Answers

Last Modified: April 07, 2017
Version Fixed: v16.1
Bug ID: FB: 199061;
IP: Altera PLL Reconfig

Are there any known issues with the Altera PLL Reconfig IP for Arria 10, Stratix V, Arria V or Cyclone V devices which may cause reconfiguration to occasionally fail?


Yes there is an issue with the Altera® PLL Reconfig IP for Arria® 10, Stratix® V, Arria V and Cyclone® V devices in Quartus® Prime software versions prior to 16.1,

In this IP there is a lack of synchronization of the locked signal, which is an asynchronous signal sourced from the PLL that is being reconfigured. This runs the small risk of causing a malfunction of the reconfiguration control state machine that the locked signal feeds, which operates in the mgmt_clk domain. This may result in a reconfiguration request to fail.


This issue is fixed in Quartus Prime software version 16.1.