Silicon R&D Pipeline

As feature sizes become smaller and circuits operate at higher speeds, the challenges of delivering more powerful and power-efficient processors increase. Active power, off-state leakage, variability in transistor behavior, and other tendencies of increasingly small devices must be addressed in order to continue delivering smaller, more-powerful, energy-efficient processors, and higher-speed, higher-bandwidth interconnects. Intel has already implemented several measures to address issues such as leakage power and we are actively researching silicon technologies that will take our products to 32nm and beyond.

Intel is looking at a variety of technologies including high-k/metal gate, 3-D transistors, and III-V materials, even carbon nanotubes, and semiconductor nanowires as high-mobility materials for future high-speed and low-power transistor applications and future interconnect applications.

High-k and metal gate

To address the leakage problems that come with shrinking transistors, Intel has identified a new high-k material, to replace the transistor's silicon dioxide gate dielectric, and new metals to replace the polysilicon gate electrode of NMOS and PMOS transistors. These new materials, along with the right process recipe, reduce gate leakage to less than 4% of what it was for the previous process generation, while delivering record transistor performance.

Developing the silicon future

As Intel® chip transistor counts rise in accordance with Moore’s Law, each transistor is designed to be smaller and faster with the goal of increased microprocessor performance. The rising transistor count and their smaller size also means increased power consumption. To meet this power challenge, Intel is exploring new ways to make high-speed and low-power transistors in the latter half of next decade.