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Packaging Technologies

As processor performance increases with improvements in process technologies, the demand on packaging solutions is also increasing. Device I/O requirements are going up, which in turn places increased demand on package interconnects. Higher-speed devices require complex thermal, power delivery and signal-integrity solutions. Intel is investing considerable resources in packaging related research and development activities.

Multi-chip system in package (SIP)

The convergence of computing and communications is driving demand for mobile devices that are thinner and lighter; as well as pack increasingly feature-rich functionality into less space. Intel researchers are addressing this challenge through advancing a technique called multi-chip "system in package" (SIP) where two or more chips are put through a thinning process and stacked in a single package.

Silicon wafers are thinned by grinding the back of the wafer to remove as much as 90 percent of the silicon. Multiple packages are then stacked to create an integrated solution that delivers more functionality and higher performance in the same or less space.

High-density interconnects

Intel is working with key substrate suppliers and universities to develop innovative solutions for high-density interconnects. State-of-the-art additive/subtractive processes are being deployed in current packaging solutions. For future needs, breakthrough technologies are under investigation. The goal of the research is to develop manufacturable and cost-effective processes that can be broadly deployed.

Thermal sciences

Intel is developing innovative thermal solutions for both package and system cooling needs. Currently, heat pipes and heat spreaders are part of the packaging solutions for our higher performance CPUs. The research in this area, which is being done with material suppliers and leading universities, is focused on developing very high-conductive, thermal-interface materials (TIMs). For system-level solutions, Intel is working with key suppliers to develop vapor chamber-based heat sinks. These solutions are offered as reference design collateral to Intel's customers. For future needs, innovative system cooling solutions are being investigated.

Power delivery

Containment of di/dt noise is a significant challenge for devices operating over one GHz. Intel is developing innovative package decoupling capacitor solutions to deliver high-performance processor packages. In addition, partnering with leading universities and consortia, Intel is spearheading the development of high-k materials and design tools.

Learn more

You can discover more by visiting the following areas of the Intel Web site:

Intel Technology Journal

Presentations

April 2004 press briefing

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