IA-64 Floating-Point Operations and the IEEE Standard for Binary Floating-Point Arithmetic

IA-64 Floating-Point Operations and the IEEE Standard for Binary Floating-Point Arithmetic (continued)

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IA-64 FLOATING-POINT OPERATIONS DEFERRED TO SOFTWARE

A number of floating-point operations defined by the IEEE Standard are deferred to software by the IA-64 architecture in all its implementations:

floating-point divide (integer divide, which is based on the floating-point divide operation, is also deferred to software)
floating-point square root
floating-point remainder (integer remainder, based on the floating-point divide operation, is also deferred to software)
binary to decimal and decimal to binary conversions
floating-point to integer-valued floating-point conversion
correct wrapping of the exponent for single, double, and double-extended precision results of floating-point operations that overflow or underflow, as described by the IEEE Standard

In addition, the IA-64 architecture allows virtually any floating-point operation to be deferred to software through the mechanism of Software Assistance (SWA) requests, which are treated as floating-point exceptions. Software Assistance is discussed in detail in the sections describing the divide operation, the square root operation, and the exceptions and traps.

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