A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process (Intel Technology Journal)

A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process (Continued)

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References

[1] K. Ohsaki, N. Asamoto, S. Takagaki, "A Single Poly EEPROM Cell Structure for Use in Standard COMS Processes", IEEE J. Solid State. Circuits, Vol 29, No. 3, March 1994, PP. 311-316

[2] J.B. Lasky, J.S. Nakos, O.J. Cain, P.J. Geiss, "Comparison of Transformation to Low-Resistivity Phase and Agglomeration of TiSi2 and CoSi2, IEEE Trans. Elect. Devices, Vol. 38, No. 2, Feb. 1991, pp. 262-269.

[3] M. Bohr, et. al., "A High Performance 0.25mm Logic Technology Optimized for 1.8V Operation", 1996 IEDM Tech Digest, 1996, pp. 847-850.

[4] J.A. Kittle, Q-Z Hong, D.A. Prinslow, G.R. Misum, "A Ti Salicide Process for 0.10 um Gate Length CMOS Technology", 1996 VLSI Symp. Tech. Digest, 1996, pp. 14,15.

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[1]	K. Ohsaki, N. Asamoto, S. Takagaki, "A Single Poly EEPROM Cell Structure for Use in Standard COMS Processes", IEEE J. Solid State. Circuits, Vol 29, No. 3, March 1994, PP. 311-316
[2]	J.B. Lasky, J.S. Nakos, O.J. Cain, P.J. Geiss, "Comparison of Transformation to Low-Resistivity Phase and Agglomeration of TiSi2 and CoSi2, IEEE Trans. Elect. Devices, Vol. 38, No. 2, Feb. 1991, pp. 262-269.
[3]	M. Bohr, et. al., "A High Performance 0.25mm Logic Technology Optimized for 1.8V Operation", 1996 IEDM Tech Digest, 1996, pp. 847-850.
[4]	J.A. Kittle, Q-Z Hong, D.A. Prinslow, G.R. Misum, "A Ti Salicide Process for 0.10 um Gate Length CMOS Technology", 1996 VLSI Symp. Tech. Digest, 1996, pp. 14,15.