Flip-Chip Technology on Organic Pin Grid Array Packages (continued)


Previous Next     Page 8 of 9

REFERENCES

[1] B. Sankman and M. Tay, "FCPGA Technology Target Specification," Intel internal document (1998).
[2] Jim Irvine and J. Dunham, "FCPGA Package-B1 Design Requirements Document," Intel internal document (1999).
[3] Jim Irvine and J. Dunham, "FCPGA Package-B2 Design Requirements Document," Intel internal document (1999).
[4] Tim Takeuchi, A. Waizman, A. Hasan and C. Baldwin, "FCPGA Package-C Design Requirements Document," Intel internal document (1999).
[5] C. Baldwin, "FCPGA Package-A Design Requirements Document," Intel internal document (1999).
[6] Rao Tummala and Eugene Rymaszewski, "Microelectronics Packaging Handbook", (1988).
[7] Y. Guo, Y. Sha, C. Jayaram, and V. Wakharkar, "Low Cost Underfill Materials for Flip Chip Packages," Intel Manufacturing for Excellence Conference (IMEC), 2000.




Previous Next     Page 8 of 9