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Original 45nm Intel® Core™ Microarchitecture
Original 45nm Intel® Core™2 Processor Performance
REFERENCES
[1] Coke, Jim. "Improvements in the Intel® Core™2 PenrynΔ Processor Family Architecture and Microarchitecture." Intel Technology Journal, Volume 12, Issue 3, 2008.
[2] Kuah, K. "Motion Estimation with Intel® Streaming SIMD Extensions 4 (Intel® SSE4)," at http://softwarecommunity.intel.com/articles/eng/1246.htm
[3] Mandelbrot set http://en.wikipedia.org/wiki/Mandelbrot_set
[4] Jahagirdar, S. "Power-Management Enhancements in 45nm Intel® Core™ Microarchitecture." Intel Technology Journal, Volume 12, Issue 3, 2008.
[5] Intel® 64 and IA-32 Architectures Optimization Reference Manual. http://www.intel.com/products/processor/manuals/
[6] Jha, A. and Yee, D. "Increasing Memory Throughput With Intel® Streaming SIMD Extensions 4 (Intel(4) SSE4) Streaming Load." At http://softwarecommunity.intel.com/articles/eng/1248.htm
[7] Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A: Instruction Set Reference, A-M. At http://www.intel.com/products/processor/manuals/
[8] Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2B: Instruction Set Reference, N-Z. http://www.intel.com/products/processor/manuals/
Δ Any codenames featured in this document are used internally within Intel to identify products that are in development and not yet publicly announced for release. For ease of reference, some codenames have been used in this document for products that have already been released. Customers, licensees, and other third parties are not authorized by Intel to use codenames in advertising, promotion or marketing of any product or services, and any such use of Intel’s internal codenames is at the sole risk of the user.
