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Intel's 45nm CMOS Technology
Section 7 of 9
Managing Process Variation in Intel's 45nm CMOS Technology
ACKNOWLEDGMENTS
We acknowledge the contributions of the 45nm process and design teams without whom this work would have been impossible. In addition, we acknowledge key contributions from Robert Bigwood, Tao Chen, Martin Giles, Mingwei-Huang, Sean Ma, Peter Moon, Karin Wells-Kilpatrick, and Kevin Zhang as well as advice and support from Mark Bohr and Kaizad Mistry.
Section 7 of 9
In this article
- Abstract
- Introduction and Historical Overview
- Critical Sources of Variation in the 45nm Generation
- Process, Design and Layout Techniques Used in the 45nm Generation to Mitigate the Impact of Variation
- Characterization of Variation in the 45nm Generation
- Conclusion
- Acknowledgments
- References
- Authors' Biographies
