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Volume 12, Issue 02

Intel's 45nm CMOS Technology


Intel Technology Journal - Featuring Intel's recent research and development

ISSN 1535-864X DOI 10.1535/itj.1202.02

  • Volume 12
  • Issue 02
  • Published June 17, 2008

Intel's 45nm CMOS Technology

  Section 5 of 8  

Process and Electrical Results for the On-die Interconnect Stack for Intel's 45nm Process Generation

CONCLUSION

The on-die interconnect stack for Intel's 45nm process generation delivers a 2X higher area density, a 10% lower average capacitance, and improved power distribution relative to the previous process generation. The new process also enables Intel's first completely Pb-free microprocessor products.

  Section 5 of 8  

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