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Volume 12, Issue 01

Technology with the Environment in Mind


Intel Technology Journal - Featuring Intel's recent research and development

ISSN 1535-864X DOI 10.1535/itj.1201.02

  • Volume 12
  • Issue 01
  • Published February 21, 2008

Technology with the Environment in Mind

  Section 5 of 9  

Making USB a More Energy-Efficient Interconnect

DISCUSSION

We discussed a number of techniques to transform USB into an energy-efficient interconnect in this paper. These techniques are based on several basic principals for power–friendly design:

  1. An efficient transfer rate (bandwidth per Watt) is important but should not be the only focus when designing an interconnect. Specifically, robust and low-power idle states are an absolute necessity.
  2. Power management states should be defined such that these states can be used effectively across a variety of idle to pseudo-active scenarios.
  3. It's all about platform power. Optimizing for low subsystem power while ignoring the subsystem's impact on the rest of the platform is a recipe for failure. Developers need to analyze both component and platform power consumption in order to catch unexpected behavior or other power-related artifacts. A poorly designed device or host controller may only consume tens of milliwatts but this can result in a multi-watt increase throughout the platform.
  4. Good idle behavior is key. An idle device should burn (nearly) zero power; the same applies to buses and host controllers. "Do nothing efficiently!"

Although USB has always had a relatively efficient data transfer rate, this provided little advantage to the platform designer because of the interconnect's significant idle penalties.

Concerning a low-power idle state, the original Suspend state was intended to address a variety of usage cases, but high latencies and other characteristics have prevented its widespread use. And although certain flow control mechanisms do exist, these were designed to address platform performance (vs. power) concerns and failed to address the fundamental issues of constant polling and associated upstream and downstream activity. The new LPM L1 state fills this void.

The Caching technique addresses upstream (host-side) activity that has prevented much of the platform from residing in a low-power state even when all USB devices (and the rest of the system) are pervasively idle.

The Deferring technique addresses downstream (device-side) activity, where entry into L1 state is used as a means by which host controllers can safely defer polling when all endpoints for a device become idle. Here the host can resume the device (and thus polling of its endpoints) when it has meaningful data to transfer and vice versa.

The combination of techniques has transformed USB from a constantly polled architecture with frequent activity to one where activity occurs only when there are meaningful data to transfer, approaching the energy efficiency of other non-polled interconnects such as PCI.

  Section 5 of 9  

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