Technology with the Environment in Mind

  Section 4 of 9  

Making USB a More Energy-Efficient Interconnect

RESULTS

There are two main reasons why the USB needs to be overhauled: to reduce the power directly consumed by USB devices and host controllers, and (more importantly) to eliminate the drastic increase in power consumption that current USB behavior has on other platform components. The techniques described herein fully address both.

As an example, Figure 12 illustrates the total platform power savings opportunity for the Caching and Deferring techniques on an Intel® Core™2 Duo processor–based system. The results were derived using measured data and best-known practices. Note that platform power increases by a whopping 5.7W when a high-speed bulk endpoint is active but constantly NAKing, as is the case for most wireless network devices. Here the Caching technique achieves a ~4.7W improvement by localizing activity to the USB host controller (EHCI), link (Port), and downstream device (WLAN), enabling the processor, GMCH, memory, and DMI interconnect to enter and remain in a low-power state. The Deferring (LPM L1) technique addresses most of the residual power by allowing the controller, port, and device to only become active when necessary (no longer polled).

Figure 12: Resulting platform power savings
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  Section 4 of 9  

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