Technology with the Environment in Mind

Materials Technology for Environmentally Green Micro-electronic Packaging

PB-FREE INITIATIVE: SOLDER THERMAL INTERFACE MATERIALS (STIM)

Intel's foray into Pb-free materials in electronic packaging began more than five years ago through the introduction of STIM in the 90nm technology node products. The relentless progress of Moore's law, leading to a doubling of transistor density in silicon chips every generation, drove the need to develop thermal solutions to dissipate additional heat generated in the silicon die. Consequently, Intel's packages have evolved from a bare die solution catering to mobile market segments to Integrated Heat Spreader (IHS) lidded products in desktop and server market segments as shown in Figure 15 [4].

Figure 15: Evolution of Intel's Package technology for meeting thermal performance requirements
 

There are several technical and cost drivers to enable lidded thermal architecture such as minimizing the impact of local hot spots by improving heat spreading, increasing the power-dissipation capability of the thermal solutions, expanding the thermal envelopes of systems, developing thermal solutions that meet business-related cost constraints, as well as developing solutions that fit within form-factor considerations of the chassis.

The primary role of the IHS is to spread the heat out evenly from the die and to provide a better bondline control of the interface material. This can be achieved by increasing the area of the IHS and by using a high thermal conductivity thermal interface material with low interfacial resistances. In order to meet thermal dissipation targets, Intel introduced polymer thermal interface materials (PTIM) initially with 3-4 W/m°K bulk thermal conductivity and then successfully transitioned to Pb-free solder-based thermal interface material to meet the ever increasing demand for thermal cooling capability as shown in Figure 16 [5].

Figure 16: Improvement in thermal cooling capability with TIM materials (Polymer vs. Solder)
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The introduction of Pb-free solder-based TIM materials posed significant integration challenges. The STIM needed to relieve the mechanical stress caused by CTE mismatch of the integrated heat spreader lid and the silicon die and to minimize stress transfer to the silicon die during thermal cycling [6]. The thermal conductivity and the mechanical compliance requirements resulted in the development and qualification of low melting temperatures (157°C Tm), low mechanical yield strength (4-6 MPa), and relatively high thermal conductivity (~87 W/m°K) pure Indium (In) metal for STIM applications. In order to use In for STIM applications, appropriate flux vehicles had to be developed to a) effectively reduce the thermodynamically stable native Indium oxide on In performs; b) to control solder joint voiding post joint formation; c) to control interfacial reactions with surface finishes on the IHS lid and the back side metallization (BSM) on the silicon die; and d) to deal with reliability issues faced in small and large die products, such as thermal fatigue cracking of the Indium during thermal cycling. The assembly process, including the reflow of the Indium STIM to form uniform intermetallic compounds (IMCs) post assembly, is a key challenge. A schematic of the STIM microstructural development as a function of packaging assembly steps is shown in Figure 17. The Indium oxide on the surface of the Indium needs to be effectively reduced in order to form uniform and defect-free intermetallic layers at both the die/Indium and the IHS lid plating (Ni/Au) and the In. Indium oxide is an extremely tenacious and thermodynamically stable oxide as shown in Figure 18 [7]. The presence of voiding in the joint can potentially lead to an increase in local thermal resistance and consequently lead to the degradation of the thermal performance of the joint. Additionally, excessive spallation of the binary Au-In IMCs as well as the formation of excessive Kirkendall voiding due to relatively different diffusion coefficients of In-Au and Ni can result in an increase in the thermal resistance of the joint.

Figure 17: Use of Indium metal as STIM and interactions with surface finish on IHS and BSM pre and post assembly
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Figure 18: Thermodynamic stability of Indium Oxide as a function of temperature
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In reliability testing as in thermal cycling, tensile and shear stresses are imposed on the STIM joint due to the mechanical coupling of the die to the IHS lid and the package as shown in Figure 19.

Figure 19: Warpage induced stresses on STIM joint at low temperature and high temp thermal cycling (Numbers in figure indicate different locations along package)
 

Typical failure modes encountered in STIM joints relate to thermal fatigue cracking of Indium close to the IHS/Indium interface which is manifested in the form of a white signature in CSAM imaging as shown in Figure 20 [6].

Figure 20: White CSAM image showing delamination at the Indium/IHS interface and corresponding cross-section SEM image showing cracking post reliability testing
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The reliability performance of the STIM joints has been found to be modulated by the relative thickness and morphology of the binary and ternary IMCs as influenced by the fluxing ability of the flux used and the reflow profile used, as well as several mechanical design attributes of the IHS dimensions/die size, package stiffness, and preform dimensions. In addition to the technical challenges faced in enabling Indium, a significant effort was made to establish a strong supply chain for IHS lid manufacturing and plating, sealant materials technology for attaching the IHS lid to the substrate, as well as the development of appropriate back side metallization on the die to enable interfacial reactions with STIM to ensure robust joint formation.

In summary, Intel's transition to Pb-free packaging materials technology was attained through a judicious choice of materials across all functional areas such as FLI, 2LI, and STIM. The Pb-free materials solutions met all the integration assembly and surface-mount challenges as well as component and board-level reliability requirements. Intel worked closely with industry partners including suppliers and the ODM and OEM customer base to achieve a smooth launch and ramp of the Pb-free packaging materials technologies.

We now discuss Intel's stewardship in enabling HF-compliant packaging materials initiatives specifically the enabling of HF substrates technology.

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