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Volume 11, Issue 04

Multi-Core Software


Intel Technology Journal - Featuring Intel's recent research and development

ISSN 1535-864X DOI 10.1535/itj.1104.01

  • Volume 11
  • Issue 04
  • Published November 15, 2007

Multi-Core Software

Section 1 of 12  

Inside the Intel® 10.1 Compilers: New Threadizer and New Vectorizer for Intel® Core™2 Processors

Xinmin Tian, Software and Solutions Group, Intel Corporation
Ernesto Su, Software and Solutions Group, Intel Corporation
David Kreitzer, Software and Solutions Group, Intel Corporation
Hideki Saito, Software and Solutions Group, Intel Corporation
Rakesh Krishnaiyer, Software and Solutions Group, Intel Corporation
Abhay Kanhere, Software and Solutions Group, Intel Corporation
John Ng, Software and Solutions Group, Intel Corporation
Chu-Cheow Lim, Mobility Group, Intel Corporation
Somnath Ghosh, Mobility Group, Intel Corporation

Index words: multi-core, optimizing compiler, threadization, vectorization, advanced optimization

Citations for this paper. Tian, X.; Su, E.; Kreitzer, D.; Saito, H.; Krishnaiyer, R.; Kanhere, A.; Ng, J.; Lim, C.; Ghosh, S. "Inside the Intel® 10.1 Compilers: New Threadizer and New Vectorizer for Intel® Core™2 Processors." Intel Technology Journal. http://www.intel.com/technology/itj/2007/
v11i4/1-inside/1-abstract.htm
(November 2007).

ABSTRACT

The fast introduction of the Intel® Core™2 Duo and Quad processors to the mass market has drawn attention to threadization (a.k.a. parallelization) and vectorization of the existing code in many application domains. In fact, multi-core processor vendors are eager to enable their users to exploit various levels of parallelism in order to harness the additional compute resources of multi-core processors. The Intel® C++/Fortran compiler provides an essential tool for unleashing the power of Intel Core 2 Duo and Quad processors. This is accomplished by means of high-level loop optimizations and scalar optimizations to exploit multi-core processors and single-instruction-multiple-data (SIMD) instructions, combined with advanced code generation, that is built on an intimate knowledge of micro-architectural performance aspects.

In this paper we outline the design and implementation of a new threadizer and vectorizer inside the Intel® 10.1 compilers, and we also provide an overview of the enhanced high-level loop optimizations and the low-level code generation used to obtain higher performance on platforms based on Intel Core 2 Duo and Quad processors. Significant performance gains are shown using the SPEC CPU2006* suite running on a system configured with two Intel® quad-core processors.

Section 1 of 12  

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