Tera-scale Computing

Foreword

• Foreword

  Jerry Bautista, Jim Held, Ram Huggahalli and Sean Koehl
  Corporate Technology Group, Intel Corporation

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Current Articles

Architecture

• Integration Challenges and Tradeoffs for Tera-scale Architectures

  Let these authors explain to you how tera-scale architecture takes the ever-increasing and demanding integration trend to its logical place: it consolidates general-purpose computer cores, special-purpose computing engines, and platform elements on a single die.

• Accelerator Exoskeleton

  To maximize performance and power efficiency, learn how future multi-core architectures may be heterogeneous, incorporating some accelerator cores alongside the IA cores. Accelerator Exoskeletons provide a shared memory multithreading programming paradigm for these accelerators using novel IA architectural extensions and software tool chains with an IA look-n-feel.

• Package Technology to Address the Memory Bandwidth Challenge for Tera-scale Computing

  These authors give you a roadmap of memory bandwidth and packaging technology to date: they outline the transitions from today’s off-package memory to increasingly complex on-package integrated memory and then take you into the unique challenges tera-scale computing presents to CPU packaging.

• Runtime Environment for Tera-scale Platforms

  The authors present a prototype of a runtime environment for a tera-scale platform and discuss the inherent challenges in such an environment. They show you how it differs in some very fundamental ways from an SMP system.

• Architectural Support for Fine-Grained Parallelism on Multi-core Architectures

  Multi-core architectures allow applications to perform at a much higher level than their unicore counterparts. Realizing this performance potential relies on the applications’ ability to effectively utilize thread-level parallelism. The authors propose a technique to exploit very fine-grained parallelism, allowing a much broader class of applications to benefit from multi-core architectures.

• Datacenter-on-Chip Architectures: Tera-scale Opportunities and Challenges

  Tera-scale computing solutions are extremely attractive for datacenter environments where the trend is to consolidate multiple server applications to run on a single platform using virtualization techniques. The authors present the datacenter-on-chip usage model and architecture and outline the key challenges and opportunities for single-chip tera-scale platforms.

Applications

• Media Mining—Emerging Tera-scale Computing Applications

  The phenomenal growth in digital media content means that users have even more information to wade through to get just what they want in a timely fashion. Hence the need for even more efficient media-mining techniques, ones that require tera-scale computing for optimum results.

• High-Performance Physical Simulations on Next-generation Architecture with Many Cores

  Physical simulation applications model complex natural phenomena. They are widely used in computer games and movie production to enable increased realism and interactivity. The authors explore the behavior of these very demanding applications on future tera-scale processors, focusing on parallelization and bandwidth requirements.

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