Tera-scale Computing

Accelerator Exoskeleton

REFERENCES

[1] I. Buck, T. Foley, D. Horn, J. Sugerman, K. Fatahalian, M. Houston, and P. Hanrahan, "Brook for GPUs: Stream Computing on Graphics Hardware," in ACM Transactions on Graphics, 23(3): 777–786, 2004.

[2] P. Dubey, "Recognition, Mining and Synthesis Moves Computers to the Era of Tera," Technology@Intel Magazine, February 2005.

[3] GLSL–OpenGL Shading Language, in www.wikipedia.org/wiki/GLSL*

[4] R. Gonzalez, "A Software-configurable Processor Architecture," IEEE Micro, Sept./Oct. 2006, pp. 42–51.

[5] GPGPU: General Purpose Computation using Graphics Hardware, at www.gpgpu.org*

[6] E. Grochowski, M. Annavaram, "Energy per Instruction Trends," in Intel^® Microprocessors. Technology@Intel Magazine, March 2006.

[7] R. Hankins, G. Chinya, J. Collins, P. Wang, R. Rakvic, H. Wang and J. Shen, "Multiple Instruction Stream Processor, in Proceedings of the 33^rd International Symposium on Computer Architecture, June 2006.

[8] J. Hoffman, D. A. Ilitzky, A. Chun, A. Chapyzhenka, "Architecture of Scalable Communication Core," in First International Symposium on Networks-on-Chip, 2007.

[9] Intel Corp., Intel G965 Express Chipset, at http://www.intel.com/products/chipsets/g965/prod_brief.pdf

[10] Intel Corp., "Intel's Next Generation Integrated Graphics Architecture – Intel Graphics Media Accelerator X3000 and 3000," White Paper, 2006.

[11] Intel Corp., "WiMAX," in Intel Technology Journal Vol. 8 Issue 3, at http://download.intel.com/technology/itj/2004/volume08issue03/
vol8_iss03.pdf

[12] U. Kapasi, S. Rixner, W. Dally, B. Khailany, J. Ahn, P. Mattson and J. Owens, "Programmable Stream Processors," in IEEE Computer, 2003.

[13] R. Kumar, D. Tullsen, P. Ranganathan, N. Jouppi, and K. Farkas, "Single-ISA Heterogeneous Multi-Core Architectures for Multi-threaded Workload Performance," in Proceedings of the 31^st International Symposium on Computer Architecture, June 2004.

[14] F. Labonte, P Mattson, W. Thies, I. Buck, C. Kozyrakis, and M. Horowitz, "The Stream Virtual Machine," in Proceedings of the 13^th International Conference on Parallel Architectures and Compilation Techniques, 2004.

[15] W. Mark, R. Glanville, K. Akeley, and M. Kilgard, "Cg: A System for Programming Graphics Hardware in a C-like Language," ACM Transactions on Graphics 22, 3, 896–907.

[16] M. McCool and S. Toit, Metaprogramming GPUs with Sh, A K Peters, Ltd., Wellesley, MA, 2004.

[17] J. Owens, D. Luebke, N. Govindaraju, M. Harris, J. Krüger, A. Lefohn, and T. Purcell, "A Survey of General-Purpose Computation on Graphics Hardware," Eurographics, August 2005.

[18] PeakStream Inc., "The PeakStream Platform: High Productivity Software Development for Multi-core Processors," White Paper, 2006.

[19] RapidMind Inc., "Performance Evaluation of GPUs using the RapidMind Development Platform," Supercomputing'06.

[20] S. Shah, G. Haab, P. Petersen, J. Throop, "Flexible control structures for parallelism in OpenMP," in Proceedings of the First European Workshop on OpenMP, Sept. 1999.

[21] M. Segal and M. Peercy, "A Performance-Oriented Data Parallel Virtual Machine for GPUs," SIGGRAPH, 2006.

[22] E. Su, X. Tian, M. Girkar, G. Haab, S. Shah, and P. Petersen, "Compiler Support of the Workqueuing Execution Model for Intel SMP Architectures," in EWOMP, 2002.

[23] D. Tarditi, S. Puri, and J. Oglesby, "Accelerator: Using Data Parallelism to Program GPUs for General-Purpose Uses," in Proceedings of the Twelfth International Conference on Architectural Support for Programming Languages and Operating Systems, Oct. 2006.

[24] W. Thies, M. Karczmarek, and S. Amarasinghe,"StreamIt: A Language for Streaming Applications,#" CC, 2002.

[25] X. Tian, M. Girkar, S. Shah, D. Armstrong, E. Su, and P. Petersen, "Compiler and Runtime Support for Running OpenMP Programs on Pentium- and Itanium-Architectures," in Proceedings of the 17^th International Symposium on Parallel and Distributed Processing, April 2003.

[26] O. Wechsler, "Inside Intel Core Microarchitecture: Setting New Standards for Energy-efficient Performance," Technology@Intel Magazine, 2006.

[27] D. Zhang, Z Li, H. Song, and L. Liu, "A Programming Model for an Embedded Media Processing Architecture," SAMOS, 2005.

Back to Top