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Intel® Centrino® Duo Processor Technology
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Intel Technology Journal - Featuring Intel's Recent Research and Development
Intel® Centrino® Duo Processor Technology
Volume 10    Issue 02    Published May 15, 2006
ISSN 1535-864X    DOI: 10.1535/itj.1002.05

  Section 13 of 13  
Intel® Intel® 945GMS Express Chipset for Small Form Factor Platform Based on Intel® Centrino® Duo Mobile Technology
Authors’ Biographies


Suresh V. Subramanyam
Suresh V. Subramanyam is the package design manager with Intel, India, supporting mobile chipsets. He has a B.S.M.E. degree from India and an M.S. degree in Materials Science & Engineering from Singapore. He joined Intel in 2003 after spending six years with HP/Agilent, Singapore. He started his career with Bharat Electronics, Bangalore, India, in 1988. His e-mail is suresh.v.subramanyam at intel.com.

Taninder S. Sijher
Taninder S. Sijher received his M.S. degree from the University of Mississippi in 2004 and his B. Tech. degree from the Indian Institute of Technology, Bombay in 2001. He has been with Intel since 2004 working as a package electrical engineer with Mobility Group India and is responsible for the electronics of the next-generation Mobile GMCH packages. His e-mail is taninder.s.sijher at intel.com.

Sidharth Krishnama
Sidharth Krishnama is a power delivery design engineer with Intel India, supporting mobile chipsets. He has a B.S.E.E. degree from India and an M.S.E.E degree from the University of Oklahoma, Norman. He started his career with Intel in 1999. His e-mail is sidharth.krishnama at intel.com.

Parthasarathy Ramaswamy
Parthasarathy Ramaswamy obtained his Ph.D. degree from IISc., Bangalore, India and is working with Intel Technology India Pvt. Ltd., Bangalore as an SIE manager. He is responsible for signal integrity and power-delivery solutions for the chipsets group. His areas of interests include high-speed PKG/Board designs, power and signal integrity studies, etc. His e-mail is ramaswamy.parthasarathy at intel.com.

Deepa Mohan
Deepa Mohan joined Intel’s Mobile Platforms group in 2003. She is a hardware design engineer in the Mobile Platform Architecture and Development team, designing Customer Reference boards for next-generation Intel® processors and chipsets. She has also worked on memory signal integrity simulations and technical marketing. Deepa received her B.E. degree in Electronics & Communication from R.V. College of Engineering, Bangalore, India in 2003. Her e-mail is deepa.mohan at intel.com.

Vikas Shilimkar
Vikas Shilimkar is a hardware design engineer with Intel, India. He joined Intel in 2004 and works in the Mobile Platform Architecture and Development group. He works on customer reference motherboard designs for Intel’s next-generation platforms. His specializations include platform and package power delivery. He holds a B.E. degree in Electronics and Telecommunication from COE Pune, India. His e-mail is vikas.s.shilimkar at intel.com.

Satish Prathaban
Satish Prathaban is a hardware design engineer in the Mobile Platform Architecture and Development team. He has an M-Tech degree from IISc-Bangalore. He started working at Intel India in 2003 in the area of motherboard and package power delivery. His e-mail is satish.prathaban at intel.com.

Eric C. Samson
Eric C. Samson joined Intel in 1983 to design communication chipsets. He currently focuses on power management architecture for chipsets. His
e-mail is eric.c.samson at intel.com.

 

Michael N. Derr
Michael N. Derr joined Intel in 1992 and has held various positions in the Client Chipset Development group over the years. Most recently, he has been working as an architect on I/O features and platform power management. His e-mail is michael.n.derr at intel.com.

Samir Gundawar
Samir Gundawar is a hardware design engineer in the Mobile Platform Architecture and Development team. He has an M-Tech degree from IIT-Delhi. He started working at Intel India in 2003 after working in Wipro Technologies for four years. His e-mail is samir.v.gundawar at intel.com.

 

  Section 13 of 13  

In This Article
Abstract
Introduction
Overview of the Mobile Intel® 945GMS Package
Intel® 945GMS Substrate Layout and Technology Challenges
Platform Power Delivery
Intel® 945GMS DDR2 SDRAM System Memory Interface
GMCH Power Management
CPU and Other Power Management Features
Future Challenges
Summary
Acknowledgments
References
Authors' Biographies
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