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| Intel® Centrino® Duo Processor Technology |
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Volume 10 Issue 02 Published May 15, 2006
ISSN 1535-864X DOI: 10.1535/itj.1002.05
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Section 1 of 13
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Suresh Subramanyam,
Mobility Group, Intel Corporation
Taninder Sijher,
Mobility Group, Intel Corporation
Sidharth Krishnama,
Mobility Group, Intel Corporation
Parthasarathy Ramaswamy,
Mobility Group, Intel Corporation
Deepa Mohan,
Mobility Group, Intel Corporation
Vikas Shilimkar,
Mobility Group, Intel Corporation
Satish Prathaban,
Mobility Group, Intel Corporation
Eric Samson,
Mobility Group, Intel Corporation
Michael Derr,
Mobility Group, Intel Corporation
Samir Gundawar,
Mobility Group, Intel Corporation
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Index words: Intel 945GMS Chipset, package, reduction, manufacturing, motherboard, routing, power management, DDR2
memory down
Citation for this paper:
Subramanyam, S.; Sijher, T.; Krishnama, S.; Ramaswamy, P.; Mohan, D.; Shilimkar, V.; Prathaban, S.; Samson, E.; Derr, M.; Gundawar, S.;
"Intel® 945GMS Express Chipset for Small Form Factor Platform Based on Intel® Centrino® Duo Processor Technology"
Intel Technology Journal.
http://developer.intel.com//technology/itj/2006/volume10issue02/
art05_945GMS_SFF_Low_Voltage/p01_abstract.htm (May 2006).
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Small form factor (SFF) platforms aim to position Intel firmly to address the fast growing mini- and sub-notebook
market, expected to increase fourfold over the next three years. This trend is proven by the increasing number of
design wins for Intel in this market segment. Intel has made significant advances in processor technology with their SFF
platforms based on the new Intel® Centrino® Duo processor technology: these include the Intel® Core™ Duo processor
Low Voltage/Ultra Low Voltage (LV/ULV), Intel® Core™ Solo processor ULV, and the Intel® 945GMS Express Chipset. To
support the mobility vectors1 of battery life and performance, several power/performance features were designed into the
processor, chipset, and platform architectures. This paper describes the power management features of the Intel 945GMS
Express Chipset Graphics and Memory Controller Hub (GMCH), the Intel® 82801GBM/GHM I/O Controller Hub (ICH), and the
overall platform, all of which have reduced their power consumption while allowing for greater performance. Intel has
designed the Intel 945GMS Express chipset to address the mini- and sub-notebook market segments. Given that the
package size had to be smaller or equal to that of the Intel® 915GMS Express Chipset (27mm2) [2], the package design
had additional challenges to meet the electrical requirements of the higher frequency Front Side Bus (FSB)/Dual Data rate
(DDR) memory and the additional 27 signals. In this paper we discuss the enhancements at the platform level, such as the
processor steeper load line and the onboard memory decoupling, which help reduce the Bill of Materials (BOM) cost and save
real estate. We also discuss in detail the platform signal and power integrity that enable the DDR2-533 MHz Small
Outline Dual In line Memory Module (SODIMM) with onboard memory and decoupling methodology.
This paper serves as a guideline for system designers to understand the benefits of the features described and design
better mini and sub notebooks. It also provides an insight into the challenges as package sizes shrink and interface speeds
grow. With this SFF platform, Intel reaffirms its strong focus on the four vectors of mobility: breakthrough mobile
performance, integrated wireless LAN capability, great battery life, and thinner/lighter design.
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Section 1 of 13
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