TS on DIMM is a closed-loop throttling technique that offers a more advanced approach to system thermal management through the use of a physical thermal sensor to further reduce guardband present in the existing methods. The reduction of guardband has a direct and positive impact on system performance.

Overview of TS on DIMM

Instead of using power prediction to estimate the temperature of the DRAM case, TS on DIMM uses a physical thermal sensor integrated on the DIMM module to monitor the temperature of DIMM. If the thermal sensor detects that the DIMM temperature is exceeding a programmable critical trip point, it triggers an event signal that tells the Graphics Memory Controller Hub (GMCH) to throttle the memory traffic, thereby reducing the DRAM case temperature. The addition of a physical thermal sensor results in a closed-loop throttling methodology that allows for real-time throttling based on the measured temperature. This closed-loop methodology leads to reduced guardband primarily due to the ability to sense ambient temperature. Most of the guardband present in existing throttling mechanisms is due to their open-loop policy, which means that since they do not receive feedback on the actual ambient or DIMM temperatures, they must always assume the worst-case scenario. TS on DIMM provides the needed temperature feedback and allows the system to hold off on throttling until the actual DIMM temperature reaches a programmed critical temperature trip point. The closed-loop policy offered by TS on DIMM is what allows it to reduce the guardband over existing memory throttling methods.

System Implementation of TS on DIMM

System implementation for TS on DIMM is very straight forward; it requires minor changes to the platform, the memory module, and BIOS. Figure 6 provides a block diagram showing the components involved and the logical connections required for TS on DIMM support. The thermal sensor [3] located around the central area of a memory module is connected to the chipset via three wires, two of them for SMBus6, and the third one for the Event# signal. TS on DIMM implementation does not require any involvement with signals on the memory bus. Any time the temperature of the sensor exceeds the threshold limit programmed by BIOS, the thermal sensor asserts the Event# signal that triggers the chipset to initiate memory throttling until Event# de-asserts. The thermal sensor will de-assert the Event# pin after the temperature goes below the critical trip point.

Figure 6: Block diagram for TS on DIMM system implementation
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The SMBus master is inside the chipset. The sensor acts as a slave sitting on the SMBus with SPD on a module. Physically, the sensor and SPD [4] can be either integrated into one package as shown in Figure 3 or separated as two stand-alone parts on a module. However, the thermal sensor and the SPD are two separate logical functions using two different SMBus addresses. At power up, BIOS read data from the SPD and initiate the thermal sensor by programming its registers via SMBus, including setting the critical threshold value. When the initiation is complete, the thermal sensor will begin monitoring the temperatures and assert the Event# signal when the temperature of the sensor exceeds the critical trip point. Once the thermal sensor is initiated the system can also poll the thermal sensor via the SMBus at any time and monitor the temperatures real-time.

Platform Requirements to Support TS on DIMM

Routing and hardware support at the platform level is simple; they just require routing the Event# signal from the GMCH [5] to each SO-DIMM connector and placing a 10k ohm pull-up resistor on this signal. For Intel chipsets, the Event# pin functionality and routing is supported on mobile platforms starting from 2006. DDR2 and DDR3 industry-standard SO-DIMM connectors both support TS on DIMM, which only required one additional connection for the Event# signal. SMBus signals were already routed through the connector for the SPD. From a platform perspective, that is all that is required to support TS on DIMM.

Thermal Sensors and Memory Modules

Thermal sensors for memory modules come in two varieties: remote and integrated. Remote thermal sensors are stand-alone 8-pin thermal sensors that can be placed on the memory module and used for monitoring temperatures. This remote thermal sensor option would be used in conjunction with standard SPD EEPROM devices used on modules today. The second option is to integrate the thermal sensor feature into the existing SPD device, also called TS in SPD, thus removing the need for an additional discrete part. Both versions operate in the same manner; they share the SMBus connections as well as the Event# signal connection. So from a platform routing perspective there is no difference between the two implementations: the module could have support for both, although only one implementation is used at a time.

Remote thermal sensors are available in the market today for use in memory module applications. The integrated TS in SPD devices are still in development with some samples starting to be available Q2’06.

Select DDR2 memory modules from limited suppliers will support TS on DIMM; some will support the remote thermal sensor implementation while others will support the integrated option.