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Volume 09, Issue 04
Electronic Package Technology Development
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Main Visual Description Intel Technology Journal - Featuring Intel's Recent Research and Development
Electronic Package Technology Development
Volume 09    Issue 04    Published November 9, 2005
ISSN 1535-864X    DOI: 10.1535/itj.0904.03
  Section 3 of 8  
Nano and Micro Technology-Based Next-Generation Package-Level Cooling Solutions
TFTEC

Figure 14 shows a TFTEC attached on the TV. The TFTEC is positioned over the hotspot of the TV. For this analysis, the main heaters are powered to 100W to establish a background heat flow and the hotspot is powered to 3W. Due to the small size of the hotspot, 400μm×400μm, the hotspot heat flux is 1875W/cm2. For this analysis, RTIM1 = 0.15ºC-cm2/W. The package in turn was cooled with a heat sink, which provides a Ψca (case to ambient thermal resistance) of 0.35ºC/W. Both thermal contact resistance and electrical contact resistance are analyzed.



Figure 14: Schematic of the physical model to simulate the performance of TFTEC




Figure 15: Impact of electrical and thermal contact resistance on the cooling performance of TFTEC
click image for larger view


The ideal condition for the TFTEC would be when there are no extra electrical contact resistances and no extra thermal resistances in the TEC. For clarification, consider the electrical and thermal resistance terms separately. The TFTEC is an electrically powered device and so there will be electrical resistance associated with each element in the electrical stack-up. Under normal conditions there will also be a contact resistance associated with each interface between adjoining materials in that stack-up. This extra contact resistance is ideally negligible, but in reality will be non-zero. The value of the electrical contact resistance can be determined by measuring the total electrical resistance of the TEC and then subtracting the electrical resistance of all the elements in the electrical stack-up. The difference is the electrical contact resistance. In a similar manner the thermal contact resistance can be determined by measuring the thermal resistance of the TFTEC and subtracting the thermal resistance of each of the elements in the thermal stack-up.

The impact of the electrical, thermal, and combined contact resistances on the ability of the TFTEC to suppress the hotspot temperature is presented in Figure 15. The amount of temperature suppression is plotted against the intrinsic ZT, where the intrinsic ZT is the ZT of the thermoelectric material itself and does not include any of the potential loss mechanisms. Temperature suppression is defined as the difference between the hotspot temperature without the TFTEC and the hotspot temperature with the TFTEC in place and powered. As the intrinsic ZT increases, so does the ability of the TFTEC to suppress the hotspot temperature. Four curves are presented in Figure 15. TFTEC performance depends on the current as well as the ZT. Performance increases with increasing current up to a point, and then decreases thereafter. Each point of each curve is therefore the maximum performance for a module with the listed ZT value based on a separate current sensitivity study. The highest curve is the idea case. For this curve the electrical and thermal contact resistances are set to 0 (turned off in the model). Keep in mind that there are still electrical and thermal resistances in the TEC, as there must always be, but that only the contact resistances have been turned off. This represents the best possible performance of the TFTEC. As can be seen, substantial hotspot temperature suppression (greater than 15ºC) is possible for intrinsic ZT about 3 and above.

The second highest curve presents the calculated temperature suppression for the case where the electrical contact resistance is used, but the thermal contact resistance is kept at 0. The electrical contact between each layer in the electrical stack-up was set to 1×10-11 Ohm-m2 for this analysis. There is still reasonably good temperature suppression for reasonable values of ZT.

The impact of the thermal contact resistance is presented by the third curve in the figure. The thermal contact resistance value of 5.75ºC/W was determined as described above for an actual TFTEC module. The curve shows a substantial degradation in the ability of the TFTEC to suppress the hotspot temperature. Based on this analysis it is apparent that the thermal contact resistance plays a much larger detrimental role in the performance of TFTEC.

Lastly the combined effect of both contact resistances is plotted. This represents a more real TFTEC module since the two major loss mechanisms are now included. It shows an additional decrease in overall performance.

The lower two curves, both with the thermal contact resistance included, show temperature suppression of less than 0 for low values of the intrinsic ZT. This simply implies that the application of a TFTEC with these properties would actually force the TV to operate at a higher temperature than if the TFTEC were not there at all.

The analysis shows that the thermal contact resistance is an important parameter and needs to be carefully controlled and minimized in order to achieve reasonable hotspot temperature suppression with a TFTEC.

 

  Section 3 of 8  

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