Technology & Research
Tomorrow's High-Performance Networks Tomorrow's High-Performance Networks
Increasing Network Performance in the Enterprise

Today we are moving beyond the "giga era" and into the "tera era." In fact, data is multiplying so quickly worldwide that it's now being measured by the exabyte—a million terabytes. Teraflops, tera-IOPs (I/O operations per second) and terabytes of information represent a new scale of workload.

Consider, for instance, the huge gains in performance necessary to handle Wal-Mart's 7.7 million terabytes per day if all items in its U.S. retail stores adopt radio frequency identification (RFID) tags. Changes like these will dramatically increase the need for more efficient communications and data processing in tomorrow's enterprises.

Intel is developing performance networking solutions to meet these challenges. We're driving Intel silicon and software innovation in key areas from network processors (NPUs) to data centers to provide superior processing performance for the computationally demanding enterprises of the future.

Intel focus areas in performance networking include:

Server Network Acceleration

Intel is developing innovative processing techniques to improve overall server application throughput and reduce network input/output (I/O) overhead. This is important research, as the rate of improvement in CPU, memory and bus frequencies can no longer keep up with the rapid growth and faster arrival rates of packet traffic.

The higher packet volumes and faster rates of arrival directly increase CPU overhead and reduce available cycles for user application. Server application throughput is throttled and data center performance degrades.

Infrastructure and Edge Networking

A significant amount of processing in the network occurs in platforms at the edge of IP networks, such as edge routers and multiservice switches. To meet the demand for new voice, video and data services, edge platforms will be required to support increasing bandwidth requirements and expand new services while preserving the existing infrastructure. Additional capabilities needed from these platforms include reliable aggregation and forwarding, robust quality of service (QoS), enhanced reliability, enhanced security, and the addition of new protocol standards.

Modular communications platforms (MCPs) will help the industry meet these demands. MCPs provide network equipment providers with reusable development and deployment platforms for more rapid innovation, greater solution flexibility, and faster time-to-market.

Intel's Modular Communications Technology Lab provides a cohesive, architectural vision for open, modular infrastructure and edge communication platforms based on Intel processors. Current research focuses on developing key technologies for tomorrow's multicore, highly threaded processor programming environments. Intel offers additional industry leadership through its work within the Intel® Internet Exchange Architecture (Intel® IXA) ecosystem and on standards ratification.

Since server network acceleration relies on so many system elements, any proposed solution must account for each facet of the process, from the network interface card (NIC) to the CPU and chipset to the protocol stack and operating system. These building blocks are interconnected elements that require a system-level solution to provide peak application throughout.

Research areas include:

Network I/O modeling and simulation
Lightweight threading
Data placement
Protocol stack optimizations
Affinity/partitioning
Remote Direct Memory Access (RDMA)
Self-Healing Platforms

Data center and infrastructure costs continue to rise. A major impediment to lowering their total cost of ownership (TCO) is the labor-intensive role people continue to play in mundane, day-to-day IT tasks.

The proliferation of Intel® architecture across enterprise computing environments (from cell phones to PDAs to mobile/desktop clients to servers) provides an opportunity for a common management solution across platforms. Providers of high-level adaptive stacks could provide management solutions that interface with Intel building blocks across the entire enterprise, from the data center to the edge of the network.

Intel's research focuses on ways to provide foundational technologies that will allow computer and networking industry companies to build these adaptive, self-managed platforms for future enterprises. By operating autonomously within the IT ecosystem, proactive building blocks could allow out-of-band (OOB) communications in all system states and enable management instrumentation, alerting, configuration, and remote control.

Learn More
High Octane CRC Generation with the Slicing-by-8 Algorithm, white paper [PDF 239KB]
A Scalable and High Performance Software iSCSI Implementation, USENIX FAST Conference paper, December 2005 [PDF 494KB]
A Systematic Approach to Building High Performance, Software-based, CRC Generators, IEEE paper [PDF 345KB]
Technology Developments Favor IP Storage Growth, Storage Networking World Online article
Server Network I/O Acceleration, white paper [PDF 90KB]
TCP Onloading for Data Center Servers, IEEE Computer article [PDF 148KB]
Intel Research and the Data Center of the Future [PDF 164KB]
Intel® I/O Acceleration Technology
Self-Managed Platforms [PDF 40KB]
ETA: Experience with an Intel® XeonTM Processor as a Packet Processing Engine* [PDF 136KB]

See these Web pages for additional information and articles:

Silicon Photonics
Era of Tera Keynote Speech (transcript) by Intel CTO and SVP Pat Gelsinger at IDF Spring 2004
All information provided related to future Intel products and plans is preliminary and subject to change at any time, without notice.
Technology Spotlight

High Octane CRC Generation with the Slicing-by-8 Algorithm
The Slicing-by-8 software CRC algorithm provides an ideal solution to speed up iSCSI data error detection, and can deliver immediate benefits by providing three-times-faster CRC calculation performance than today’s leading CRC algorithm. Learn more [PDF 148KB].

A Scalable and High Performance Software iSCSI Implementation
Read a paper presented at the 2005 USENIX FAST Conference that details two novel techniques for improving the performance of the Internet Small Computer Systems Interface (iSCSI) protocol. Learn more [PDF 494KB].

Improving Packet Processing Performance
A Flash* animation [download 9.9MB] from Intel shows how technologies now in development can improve packet processing performance, potentially reducing the number of clocks required to process a packet by 10X.
(Need Flash? Get it here*.)

Additional Resources
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