Intel® Advanced Technologies for Communications and Embedded Applications
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Intel® QuickAssist Technology

  • Overview
  • Multi-Core
  • Virtualization
  • Trusted Execution
  • Active Management
  • Intel® QuickAssist Technology
  • I/O Acceleration

Intel® QuickAssist Technology is a family of interrelated technologies that enable developers to choose and easily deploy the optimum accelerator for their particular embedded or communications solution. This combination of both Intel and industry standard technologies means that the Intel QuickAssist Technology Acceleration Abstraction Layer (AAL) is not bound to a particular hardware acceleration strategy. The benefits of this approach include:

  • Decreased development time. Independent Software Vendors no longer need to develop proprietary acceleration layers for each new device.
  • Increased business flexibility. End users can choose devices and solutions that fit their changing business requirements without being tied to a particular accelerator. Choices include a software-only solution, Integrated Acceleration Technology, a hardware-attached solution that connects via PCI-X, PCI Express*, FSB-FPGA or Intel® QuickPath Interconnect.
  • Future ready. Intel QuickAssist Technology is supported on current Intel multi-core processors and was developed to support future generations of system-on-chip and multi-core processor designs.

Front Side Bus (FSB)-to-FPGA Acceleration Strategy

Intel QuickAssist Technology promotes a front side bus attachment strategy for accelerators. Following on this strategy, Intel is working with FPGA vendors, accelerator module vendors and accelerator algorithm vendors to develop accelerator technologies that attach directly to the FSB.

Intel QuickAssist Technology supports industry solutions and the FSB-to-FPGA approach in several ways, including:

  • Accelerated performance for demanding applications with Front Side Bus attached Field Programmable Gate Array (FSB-FPGA) hardware modules.
  • Agility to migrate from one technology to another with minimum impact to applications with Intel QuickAssist Technology Accelerator Abstraction Layer (AAL).
  • Support for small form factor accelerators with emerging technology codenamed "Tolapai" that combines numerous powerful enabling technology on a single chip.
  • Broad sweeping accelerator improvements with protocol and speed improvements to PCI Express* 2.0 initially proposed by Intel and IBM (previously called Geneseo). PCI Express* 3.0 is expected to be the PCI-SIG's response to this proposal and will improve accelerator efficiency and double delivered bandwidth to 8GT/s.

Learn more about Intel QuickAssist Technology

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