Processors
Processors
Floating Point Unit (FPU) exception handlers for Intel® Architecture (IA)

Floating Point Unit (FPU) exception hander information for Intel® processors is available in the following documents:

Application note AP-578, Software and Hardware Considerations for FPU Exception Handlers for Intel® Architecture Processors, Intel® Document #243291. This application note provides information to help software engineers write the most robust Floating-Point Unit (FPU) exception handlers possible.

Also see the Intel® Pentium® Processor Family Developer's Manual, Volume 3, Intel® Document #241430, contains three chapters about programming the floating point unit, including one chapter dedicated to programming examples.

Also see the Intel® Architecture Software Developer's Manual, Volume 1: Basic Architecture, Intel® Document #243190, Chapter 7 and Appendix C.

This applies to:

Intel® Celeron® Desktop Processor
Intel® Pentium® 4 Processors
Intel® Pentium® III Processor
Intel® Pentium® III Xeon® Processor
Intel® Xeon® Processor
Mobile Intel® Celeron® Processors
Mobile Intel® Pentium® 4 Processors - M
Mobile Intel® Pentium® III Processor

Solution ID: CS-030168
Last Modified: 10-Oct-2011
Date Created: 03-Feb-2009
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