Deep sleep (C3) and deeper sleep (C4) are terms used to describe the power management of mobile platforms. Power management is about improving battery life by putting the CPU to "sleep" when not in use. C3 "deep sleep" and C4 "deeper sleep" are ACPI power management states. Deeper sleep comes from improvements in CPU and chipset interaction to redirect snoop cycles. The CPU stays in deep C4 state longer, resulting in lower power consumption while idle.
CPU/Package sleep states:
C0 - Active: CPU is on and operating.
C1 - Auto Halt: Core clock is off. The processor is not executing instructions, but can return to an executing state almost instantaneously. Some processors also support an enhanced C1 state (C1E) for lower power consumption.
C2 - Stop Clock: Core and bus clocks are off. The processor maintains all software-visible state, but can take longer to wake up.
C3 - Deep Sleep: Clock generator is off. The processor does not need to keep its cache coherent, but maintains other states. Some processors have variations of the C3 state (Deep Sleep, Deeper Sleep) that differ by how long it takes to wake the processor.
C4 - Deeper Sleep: Reduced VCC
DC4 - Deeper C4 Sleep: Further reduced VCC
ACPI (Advanced Configuration and Power Interface)*
The ACPI on the System Manageability Bus enables low-power sleep mode and conserves energy when a system is idle.
How power is efficiently directed to different components of a system. Power management is especially important for portable devices that rely on battery power. By reducing power to components that are not being used, a good power management system can double or triple the lifetime of a battery.
Works along with Intel® QuickStart technology on Intel® Mobile Processors. Deeper Sleep is a dynamic power management mode that delivers longer battery life. Deeper Sleep minimizes the power consumption of the CPU when it senses an extended period of inactivity by the user. It reduces power when idle and quickly restores the CPU to an active state as soon as the user resumes use of the system. It reduces processor voltage below the minimum operating voltage while preserving the processor state. Deeper Sleep is functionally identical to the Deep Sleep State but at a 66 percent lower voltage.
Extends battery life by entering a low-power state during the briefest pauses in user activity, such as between key strokes. Instantly returns to full-power state when prompted.
Intel® Enhanced Deeper Sleep with Dynamic Cache Sizing
This new power savings mechanism flushes system memory dynamically, based on demand or during periods of inactivity. Power savings occur as the cache ways are turned off once the data has been saved in memory. L2 cache data integrity determines Deeper Sleep minimum voltage limits for the Intel® Core™ Duo processor. Once the Dynamic Cache Sizing feature flushes the entire L2 cache to memory, the processor transitions to Intel® Enhanced Deeper Sleep. This allows the processor to lower voltage below the Deeper Sleep minimum voltage for enhanced power savings and/or efficiencies.
Advanced Configuration and Power Interface*
Advanced Configuration and Power Interface Specification*
CPU Power Utilization on Intel® Architectures
Dadi Perlmutter Keynote (PDF)*
Intel® 64 and IA-32 Architectures Optimization Reference Manual
Intel® Centrino® Duo Processor Technology and Intel® Centrino® Pro Processor Technology Fact Sheet
Performance Rich Technologies
This applies to: