Intel® Pentium® II Xeon® Processor
Bus terminator design guidelines

The Intel® Pentium® II Xeon® processor includes termination circuitry for the microprocessor's Assisted Gunning Transceiver Logic (AGTL+) bus. In a multiple-processor system each processor location (slot connector) must be properly terminated, whether or not all locations have processors installed. This document describes design considerations for a termination card to occupy unused connector locations and terminate the bus.

These design guidelines include layout rules and hints based on system design experience. They do not define a specific card design nor constitute a specification. Card designers will still need an understanding of the system the card will be used in and will need to perform the customary simulation and system testing.

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Size: 113056 bytes
Date: May 1999

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This applies to:

Intel® Pentium® II Xeon® Processor

Solution ID: CS-011194
Last Modified: 16-Nov-2009
Date Created: 14-May-2004
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