The primary objective of the Intel® Mote research project is to build an enhanced generation of the “mote” technology originally developed through the collaborative efforts of the University of California Berkeley and the Intel Research Berkeley laboratory. Motes are tiny, self-contained, battery-powered computers with radio links, which enable them to communicate and exchange data with one another, and to self-organize into ad hoc networks. Motes form the building blocks of wireless sensor networks.
The Intel Mote project team seeks to create a new platform design that delivers a high level of integration as well as low-power operation in a small physical size. Features of the new platform include modular hardware and software design; system power management; and low-cost, high volume production potential.
One major goal of the Intel Mote project is to collaborate with the research community in exploring potential new applications of motes and sensor networks. With that objective in mind, Intel’s mote design will fully support TinyOS* the operating system developed at UC Berkeley for use in sensor networks and other embedded systems. The team is working with TinyOS developers on enhancements that will enable users of the Intel Mote to access its new features.
Intel Motes can serve as the building blocks for wireless sensor networks. These
networks are being deployed in a growing number of applications as diverse as agricultural management, structure and earthquake monitoring, industrial controls, and military applications. Potential future markets include transportation and shipping, fire fighting and rescue operations, home automation and even interactive toys.
The Intel project team has developed a prototype of the next-generation Intel Mote. Further research will focus on additional hardware and software improvements and increased levels of integration. The ultimate goal is to develop an Intel Mote in the form of a single microchip with layered components, including sensor and RF MEMS (micro electro-mechanical systems), nonvolatile storage, digital/analog silicon, and a battery.
The work is being conducted in collaboration with Intel Research Berkeley, Intel Research Seattle, and other academic researchers at leading universities throughout the U.S and worldwide. Additional collaboration with other Intel researchers focuses on multi-hop routing and sensor gateways. Finally, Intel interacts with standards bodies to promote low-power radio technology and consult with industry participants in the areas of industrial and home automation and controls.
Research Agenda
Intel’s research agenda focuses on technology enhancements in three areas: ultra low-power operation, system level integration, and hardware reconfiguration.
Ultra Low-Power Operation
The team is striving to design an ultra low-power mote that is about two orders of magnitude below the operational power of traditional low-power platforms (such as Intel XScale® based designs). This ultra low-power mote will require smart wireless communication capabilities to achieve a battery life of 6 months to one year.
System Level Integration
Research is also focused on achieving system level integration. The main drivers for this effort are cost and size reduction. The goal is to find a cost-efficient way of integrating all the devices that are part of the Intel Mote platform: the CPU core, analog and digital radio components, and Flash and SRAM memory, as well as some of the sensors, which may be MEMS-based. Ultimately, the goal is to integrate all of these features into a single system on a chip (SOC) or system in a package (SIP).
Hardware Reconfiguration
New radio protocols and applications continue to emerge. The exact protocols and applications and the demands they will place on computing power are currently unpredictable. The challenge is to ensure that the Intel Mote will efficiently balance power and performance in this changing environment. To meet the challenge, we are investigating the use of reconfigurable hardware blocks in order to create a flexible platform that is able to accelerate execution of specific tasks while simultaneously conserving power.
Next-Generation Intel® Mote
At the start of the Intel Mote project, the project team spoke with researchers at Intel Research Berkeley and several start-ups as well as with people working in standards bodies, to understand the requirements for motes used in sensor network applications. At the top of the list: more CPU power, for tasks such as location detection and digital signal processing; more reliable wireless radio links; and security features.
Intel Mote prototype (original size: 3x3 cm)
The team then set out to develop a next-generation mote, incorporating these features as well as a number of other enhancements. In building the prototype, Intel maintained the modular design of the original Berkeley mote while reducing its cost and size. We are also working to increase battery life by reducing wireless transmission overhead. To achieve this, the team is striving to maintain the operational duty cycle at less than 1%, by applying hardware solutions for synchronization and low-power modes and software algorithms that enable smart networking protocols.
Intel Mote Hardware
The next-generation Intel Mote hardware is a modular, stackable design that includes the following components in a package that is about half the size of the original Berkeley mote. Intel Research is using the Zeevo* module on the main board (containing an ARM1 core, SRAM and Flash memory, and Bluetooth* wireless technology), an optional power supply regulator, and sensor boards. The mote platform can accommodate other features as well, such as alternate radio, debug and actuator boards. A backbone interconnect provides power and bidirectional signaling capability.
Intel Mote and Sensor Net Software
Intel Mote software is based on Tiny OS, a component-based operating system designed for deeply embedded systems that require concurrency-intensive operations and which have minimal hardware resources. The software stack includes an Intel Mote-specific layer with Bluetooth* support and platform device drivers, as well as a network layer for topology establishment and single / multi-hop routing. The software will also incorporates security features, including authentication and encryption in the near future.
Next-Generation Intel® Mote
Project Leader: Ralph Kling, Ph.D.
Ralph Kling
Ralph Kling is a member of Intel’s Corporate Technology Group and leader of the Intel Mote strategic research project. Since joining Intel in 1990, Ralph has worked primarily in computer architecture research and development groups. Among other responsibilities, he has served as manager of the Itanium® Processor Family and Microprocessor Research Lab microarchitecture/ performance research groups. In these roles, he helped to develop and evaluate microarchitecture components for the Itanium® 2 processor. His team also created Intel’s first modular and cycle accurate execution-driven performance and power simulation environment, which has now been propagated throughout the company.
Ralph obtained his Master’s and Ph.D. degrees from the University of Illinois at Urbana-Champaign. His thesis research focused on simulated evolution, a new global optimization method for integrated circuit designs. Before coming to the U.S. on a Fulbright scholarship, he studied electrical engineering in his hometown of Hannover, Germany.
Research Team
The Intel Mote project involves collaboration among researchers within Intel and the Intel Research Network of university labs as well as academics in leading universities throughout the U.S. The core team members include Robert Adler, Vincent Hummel and Jonathan Huang.
Robert Adler
Vincent Hummel
Jonathan Huang
1 The ARM*, StrongARM* and ARM Powered logo marks (the ARM marks) are trademarks of ARM, Ltd., and Intel uses these marks under license from ARM, Ltd.
