Vivek K. Singh
Intel Fellow, Technology and Manufacturing Group
Director, Computational Lithography
INTEL CORPORATION
Vivek Singh is an Intel Fellow and director of computational lithography in Intel's Technology and Manufacturing Group.
He is responsible for all of Intel's CAD and modeling tool development in full chip OPC, lithography verification, rigorous lithography modeling, next-generation lithography selection, inverse lithography technologies and double patterning. He also represents Intel on several external Design for Manufacturability (DFM) forums, and is currently chairman of the SPIE DFM Conference.
Singh joined Intel in 1993 as a modeling applications engineer, was appointed team leader for the Resist and Applications Group in 1996, and was appointed overall leader of the Lithography Modeling Group in 2000.
He holds 13 patents, has published 38 technical papers and won the Intel Achievement Award in 2007.
Singh graduated from the Indian Institute of Technology in Delhi with a bachelor's degree in chemical engineering in 1989. He earned a master's degree in chemical engineering in 1990, a Ph.D. minor in electrical engineering in 1993, and a Ph.D. in chemical engineering in 1993, all from Stanford University.
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