Joseph M. Steigerwald
Intel Fellow, Technology and Manufacturing Group
Director, Chemical Mechanical Polish Technology
INTEL CORPORATION
Joe Steigerwald is an Intel Fellow and director of Chemical Mechanical Polish Technology, Intel Technology and Manufacturing Group. He is responsible for pathfinding, development, and transfer to high volume manufacturing of advanced chemical metal polish (CMP) and metals deposition modules for Intel's 32nm, 22nm, and 16nm logic and advanced memory technologies.
Steigerwald originally joined Intel in 1988 as a fab etch engineer. He left for a brief time to pursue advanced electrical engineering degrees and has been with the company continuously since 1995. He has held a number of leadership roles in the company's Portland Technology Development organization, primarily in the CMP area. His work in CMP has lead to major advancements in this critical technology, enabling key elements of Intel's silicon process architecture.
Steigerwald has written one book and one book chapter and hold three patents for advances in his CMP area of expertise. His work has appeared in more than a dozen journal publications and he has made numerous technical conference and workshop presentations.
Originally from Upstate New York, Steigerwald received his bachelor's degree in electrical engineering from Clarkson University in 1988. He received his masters and doctorate degrees in electrical engineering from Rensselaer Polytechnic Institute in 1993 and 1995, respectively.
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