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Boris A. Babayan
Intel Fellow, Software and Solutions Group
Director, Architecture
INTEL CORPORATION
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| Patents — U.S. |
 | 5,418,975, Wide instruction word architecture central processor, 5/23/1995 (with Vladimir J. Volkonsky, July K. Sakhin, Sergei V. Semenikhin, Valery Y. Gorshtein, Alexandr K. Kim, Leonid N. Nazarov). |
| 6,243,822, Method and system for asynchronous array loading, 6/5/2001 (with Mikhail L. Chudakov, Oleg A. Konopleff, Yuli Kh. Sakhin, Andrey A. Vechtomov) |
| 6,516,463, Method for removing dependent store-load pair from critical path, 2/4/2003 (with Sergey K.Okunev and Vladimir Y. Volkonsky) |
| 6,526,573, Critical path optimization-optimizing branch operation insertion, 2/25/2003 (with Sergey K.Okunev and Vladimir Y. Volkonsky) |
| 6,549,903, Integrity of tagged data, 4/15/2003 (with Feodor A. Gruzdov, Vladimir Y. Volkonsky, and Yuli Kh. Sakhin) |
| 6,564,372, Critical path optimization-unzipping, 5/13/2003 (with Sergey K. Okunev and Vladimir Y. Volkonsky) |
| 6,584,611, Critical path optimization - unload hard Extended Scalar Block, 6/24/2003 (with Sergey K.Okunev and Vladimir Y. Volkonsky). |
| 6,560,775, Branch preparation, 5/6/2003 (with Feodor A. Gruzdov, Alexey P. Lizorkin, Yuli Kh. Sakhin, Evgeny Z. Stolyarsky, and Alexander M. Artymov). |
| 5,794,029, Architectural support for execution control of prologue and epilogue periods of loops in a VLIW processor, 8/11/1998 (with Valeri G. Gorokhov, Feodor A. Gruzdov, Yuli Kh. Sakhin, and Vladimir Yu. Volkonski). |
| 5,889,985, Array prefetch apparatus and method, 3/30/1999 (with Valeri G. Gorokhov, Feodor A. Grusdov, Yuli Kh. Sakhin, and Vladimir Y. Volkonski). |
| 5,958,048, Architectural support for software pipelining of nested loop, 9/28/1999 (with Feodor A. Gruzdov, Yuli Kh. Sakhin, Vladimir S. Volin, and Vladimir Yu. Volkonski). |
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| Patents — Russia |
| Patent RF No. 1804645, Central processor, 1992 (with Y.K. Sakhin; V.Yu. Volkonskiy; V.Ya. Gorshtein; A.K.Kim; L.N. Nazarov; S.V. Semenikhin). |
| Patent RF No. 1777148, Computer System, 1993 (with Y.K. Sakhin; V.Yu. Volkonskiy; V.Ya. Gorshtein; A.K. Kim; L.N. Nazarov; S.V. Semenikhin). |
| Patent RF No. 2166791, Method and system for asynchronous array loading, 2000 (with A.K. Kim; M.L. Chudakov; Z.N. Zaitseva; V.K. Kabykin). |
| Patent RF 2184389, Method for pipelining of nested loop, 2002 (with V. Yu. Volkonskiy; V.G. Gorokhov; F.A. Gruzdov; A.K. Kim; A.Yu. Ostanevich). |
| Patent RF 2189630, Method and device for filtering interprocessor calls in multiprocessor computer systems, 2002 (with V.V. Tikhorskiy; A.K. Kim; M.L. Chudakov). |
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| IFIP Congress'89, XI World Computer Congress, San Francisco, California, USA, 1989. Elbrus Software Methodology: Instrumentation - Experience. |
| International Conference on Parallel Computing Technologies, Novosibirsk, Russia, 1991. Methods of Parallel Information processing in Architecture of Soviet High-Performance Computers. |
| COMPCON 92 IEEE, San Francisco, California, USA, 1992. History of Soviet Computers. |
| COSMOS, Japan, 1994; New projects in Modern Architecture. |
| ACM 50th Anniversary celebration, USA, March1997; Member of the Honorary Committee ACM97. |
| Japan-Russia Advanced Science and Technology Exchange Promotion Forum. Tokyo, July 2000. E2K technology and Implementation. |
| HPC ASIA 2000. The Fourth International Conference/Exhibition on High-Performance Computing in Asia-Pacific Region, May 14-17, 2000, Beijing, China. Plenary speech: E2k Microprocessor Architecture Principles. Tutorial: Current status of High Performance Computing in Russia and E2k Microprocessor Basic Technologies: high speed, binary compatibility, secure computing. |
| 8th Annual Meeting of the American-Russian Chamber of Commerce, September 27, 2000, Denver, Colorado, USA. Cooperation between Elbrus team and American companies. |
| Business Computing: The Second 50 Years, 5-6 November, 2001, Guildhall, London, GB. 50 years of Business Computing. Panel discussion: Economic and social consequences and public policy. |
| Euro-Par 2000 Parallel Processing. 6th International Euro-Par Conference, Munich, Germany, August-September 2000; E2K technology and Implementation. |
| B. Babayan. "Elbrus architecture and software." Proceedings of the 4th All-Union Symposium on System and Theoretical Programming, Kishinev, Moldova USSR, May 31-June 2, 1983. |
| B. Babayan. "Basic principles for building CAD system." Dr.Sci. Dissertation, Institute of Precise Mechanics and Computer Equipment, Russian Academy of Science, 1972. |
| B. Babayan. "Methods of arithmetic operation execution for parallel computer." Transactions of the Moscow Institute of Physics and Technology, 1958. |
| Elbrus system. B. Babayan; Yu. Sakhin. Programming magazine, # 6, 1980. |
| System performance of Elbrus 1 multiprocessor computer system. B. Babayan, Yu. Sakhin. Transactions of the Institute of Precise Mechanics and Computer Equipment, USSR AS, 1985, Moscow. |
| B. Babayan, Yu. Sakhin. Elbrus system architecture and software. All Union conference High performance Computer Systems, 1981, Tbilisi, USSR. |
| B. Babayan, Yu. Sakhin, V. Gorshtein, G. Kim, L. Nazarov. Specific features of Elbrus CPU architecture. Transactions of the Institute of Precise Mechanics and Computer Equipment, 1985, Moscow, USSR. |
| B. Babayan, Yu. Sakhin, V. Gorshtein, G. Kim, L. Nazarov. Specific features of Elbrus architecture and structure. VII All-Union conference "Multiprocessor computer systems", 1986, Taganrog, USSR |
| B. Babayan, Yu. Sakhin, A. Barda. Some features of future multiprocessor systems. VII All-Union conference "Multiprocessor computer systems", 1986, Taganrog, USSR |
| B. Babayan, Yu. Sakhin, V. Volkonskiy, V. Gorshtein, G. Kim, L. Nazarov. Specific features of Elbrus architecture and structure. First All Union conference "Supercomputers: development problems and use efficiency," 1987, Minsk, USSR |
| B. Babayan, Yu. Sakhin, A. Barda, V. Gorshtein, G. Kim, L. Nazarov, V. Chadov. Some specific features of multiprocessor system structure. Workshop panel "Design and Development of real-time multicomputer and multiprocessor systems," 1987, Scientific Society "Znanie," Moscow, USSR. |
| B. Babayan, G. Ryabov, G. Chinin. Elbrus software methodology: instrumentation - experience. Information Processing 89, G.X.Ritter, Elsevier Science Publishers B.V. (North-Holland), IFIP, 1989. |
| Boris Babayan. Methods of parallel information processing in architecture of soviet high-performance computers. Information processing 91, 1991, World Scientific. Singapore-New Jersey-London-Hong Kong. |
| B. Babayan. Main principles of E2K architecture. Free Software Magazine, vol. 1, No.2, February 2002. |
| B. Babayan, Yu.Sakhin, A. Kim. "MCST-R" Family of Russian Universal Microprocessors." Electronics: Science, Technology, Business, No. 3, 2003. |
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| Acting Director, Institute of Microprocessor Computer Systems (IMCS) |
| Chairman at Elbrus International (1997 till present) |
| Chief Technological Officer at the Moscow Center for SPARC Technologies (MCST) (1992 till present). |
| Chairman of the Academic Council at the Institute of Microprocessor Computer Systems, RAS |
| Chairman of the Dissertation Council for awarding Ph.D. and Doctor of Science degrees IMCS RAS |
| Member of State Committee for State Prize Award of Russian Federation |
| Deputy Editor-in-Chief of "Information Technologies and Computer Systems" journal, Russian Academy of Science |
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