High-k and Metal Gate Transistor Research
Intel made a significant breakthrough in the 45nm process by using a "high-k" (Hi-k) material called hafnium to replace the transistor's silicon dioxide gate dielectric, and by using new metals to replace the N and PMOS polysilicon gate electrodes. These new materials (along with the right process recipe) reduced the NMOS gate leakage by >25X and PMOS gate leakage by more than 1000X while simultaneously delivering improved drive current and improved circuit performance.
High-k, Quantum Mechanical Tunneling and Gate Leakage
Gate leakage in a modern transistor occurs through a process called "quantum mechanical tunneling." Under normal circumstances, all the electrons are on the "upstream" side of the gate (picture the gate as a dam, and electrons as water trapped behind the dam). Quantum mechanical tunneling occurs when the gate dimension is so thin that the electrons (or holes) have a certain statistical probability of being on the "downstream" side of the gate - without actually sloshing over the gate. In modern transistors, the gate thickness is about five atomic layers. The thinner the gate, the larger the tunneling current and the higher the leakage power.
The tunneling current can be reduced by thickening the gate. The problem here is that increasing the physical gate thickness increases the electrical oxide thickness, and thus reduces the transistor performance. The ideal solution would be to increase the physical thickness WITHOUT increasing the electrical oxide thickness. Amazingly enough, this is possible by increasing the "k" (or dielectric constant) of the material. A "higher-k" material can be physically thicker (by approximately the ratio of the old/new "k") without being electrically thicker.
"High-k" stands for high dielectric constant, a measure of how much charge a material can hold. Air is the reference point for this constant and has a "k" of 1.0. Silicon dioxide (the "old-fashioned" gate material) has a "k" of 3.9. "High-k" materials, such as hafnium dioxide (HfO2), zirconium dioxide (ZrO2) and titanium dioxide (TiO2) have "k" values higher than 3.9.
Metal-gate, Poly-depletion, and Drive Current
Historically, doped poly-silicon has been used as the gate electrode of CMOS transistors. Doped poly-silicon is a semiconductor, and thus will form a "depletion" region when voltage is applied. This "depletion" region acts very much like a thicker oxide, in that it reduces inversion charge (thus reducing inversion capacitance) with resulting degradation in drive current.
Replacing the doped poly-silicon with a metal eliminates poly-depletion. The transistor acts like it has a thinner oxide in inversion; with associated capacitance and drive current improvement.
Intel considers high-k metal-gate to be in continual development, with 45nm now well-established in manufacturing, with 32nm on a two-year offset and just entering manufacturing.
A 32nm Logic Technology Featuring 2nd-Generation High-k + Metal-Gate Transistors, Enhanced Channel Strain and 0.171um2 SRAM Cell Size in a 291Mb Array
A 45nm Logic Technology with High-k + Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging