Intel Microprocessor Package Design Technology

The Importance of Packaging
As semiconductor devices become significantly more complex, electronics designers are challenged to fully harness their computing power. Transistor count in products can exceed 100 million. With a greater number of functions integrated on a die or chip of silicon, manufacturers and users face new and increasingly challenging electrical interconnect issues. To tap the power of the die efficiently, each level of electrical interconnect from the die to the functional hardware or equipment must also keep pace with these revolutionary devices. Package design has a major impact on device performance and functionality.

Today, submicron feature size at the die level is driving package feature size down to the design-rule level of early silicon transistors. At the same time, electronic equipment designers are shrinking their products, increasing complexity, setting higher expectations for performance, and focusing strongly on reducing cost. To meet these demands, package technology must deliver higher lead counts, reduced pitch, reduced footprint area, provide overall volume reduction, aid in system partitioning, and be cost effective.

Circuit performance is only as good as the weakest link. Therefore, a significant challenge for packaging is to ensure it does not limit device performance. While packaging cannot add to the theoretical performance of the device design, it can have adverse effects, if not optimized. Package performance, therefore, is the best compromise of electrical, thermal and mechanical attributes and form factor to meet product specific applications, reliability and cost objectives.

Intel's Package Portfolio More Than Doubled During Past Ten Years
Fit, form and function tend to be market specific. Certain Intel devices serve more than one market need, but may require different package attributes. Therefore, "one size fits all" is not a practical approach to device packaging. Packaging technology is not a single technology, but consists of more than 20 industry-proven combinations of core technologies that can be categorized by package families.

Intel's package portfolio has more than doubled during the past ten years because of the growing number of Intel devices. The portfolio has also grown to meet the industry demand for package-specific applications.

The Evolution of Intel Packaging
Continuing demand for high-performance processors requires package performance unattainable by the molded plastic and ceramic packages available during the past decade. These factors have driven a variety of major innovations in Intel packaging. While these packages differ in form factor, all can provide the required electrical and/or thermal performance needed by Intel's high-performance microprocessors.

• Organic packaging with copper interconnects has superior electrical characteristics and helps provide high performance in a cost effective manner.
• Flip chip as the interconnect between die and package further improves microprocessor performance within a very compact package. This development created new classes of technology that use organic substrates for both surface-mount (organic land grid array - OLGA) and through-hole (flip chip pin grid array - FCPGA) interconnects. Surface-mount technology packages are soldered directly to conductors on the surface of a board, which allows for smaller boards, because chips can be mounted to both sides of the board.
• The microPGA package was introduced to combine flip chip interconnect with a very small form factor and socketability. This makes the package optimal for compact and portable systems, such as notebook computers.

About Intel
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