Application Note: Intel® ICH7, ICH8, ICH9 and ICH10 — SPI Family Flash Programming Guide
Learn the various aspects of programming SPI flash on ICH family based platforms. This includes compatibility requirements, configuring BIOS, image and programming tools, etc.
ファイルの種類 / サイズ: PDF 929KB
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Intel® 5520 Chipset – XOR Test Mode
This document describes the XOR manufacturing test mode used to test the PCIe* interface.
ファイルの種類 / サイズ: PDF 141KB
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Intel® 82801Jx I/O Controller Hub (ICH10)—Testability Package
The In-Circuit Tester zip file contains a document that describes
the XOR Chain test mode and enabling the JTAG interface, the in circuit test
file, and the JTAG access file.
ファイルの種類 / サイズ: ZIP 84KB
バージョン: 1.0 : 2008年6月
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Intel® Software Development Products Learning Lab
Access a range of resources to learn how to improve the performance and reliability of serial and parallel applications.
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Intel® SSE4 Programming Reference
Intel® Streaming SIMD Extensions 4 (SSE4) introduces 54 new instructions to
improve the performance of media, imaging and 3D workloads in Intel®
processors. (Nehalem-EP processor)
バージョン: 003 : 2007年7月
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Intel® Xeon® 5600/5500 Series Processor Family Intel® Turbo Boost Technology Update
Learn about the feature, software control and interaction, detecting when the feature is active, and platform design considerations.
ファイルの種類 / サイズ: PDF 835KB
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Intel® Xeon® Processor 5500 Series and the Intel® 5520 Chipset Server Platform Services Firmware Integration Guide
This document describes the integration process for server platform services (SPS) firmware (FW) implemented on the manageability engine of the Intel® 5520 chipset.
ファイルの種類 / サイズ: PDF 1,108KB
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Presentation: Introduction to Intel® Core™ i7
This audio/video presentation introduces the new features of the Intel® Core™ i7 processor family and the Intel® Core™ i7 platform. (Requires Flash)
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Software Developer Manual (SDM): Intel® 64 and IA-32 Architectures, Volume 1: Basic Architecture
These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions allow you to quickly get to the information you need.
バージョン: 2009年9月
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Software Developer Manual (SDM): Intel® 64 and IA-32 Architectures, Volume 2A: Instruction Set Reference A-M
These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions allow you to quickly get to the information you need.
バージョン: 2009年9月
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Software Developer Manual (SDM): Intel® 64 and IA-32 Architectures, Volume 2B: Instruction Set Reference N-Z
These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions allow you to quickly get to the information you need.
バージョン: 2009年9月
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Software Developer Manual (SDM): Intel® 64 and IA-32 Architectures, Volume 3A: System Programming Guide Part 1
These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions allow you to quickly get to the information you need.
バージョン: 2009年9月
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Software Developer Manual (SDM): Intel® 64 and IA-32 Architectures, Volume 3B: System Programming Guide Part 2
These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions allow you to quickly get to the information you need.
バージョン: 42 : 2012年3月
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Webinar: Tuning your Application for the Intel® Microarchitecture (Nehalem) Family
This presentation contains the best-known methods for maximizing software performance with processors based on Intel® Microarchitecture (Nehalem). (Requires Flash) Duration: 29:17.
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White Paper: Accelerating XML Processing with Intel® SSE4.2 to Improve Business Solutions
This white paper introduces the Intel® XML Software Suite and demonstrates how Intel® SSE4.2 instructions can be used to accelerate XML processing by 20 percent or more.
バージョン: 2008年11月
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White Paper: Accessing the Real Time Clock Registers and NMI Enable Bit—A Study in I/O Locations 0x70-0x77
This paper explains how I/O address aliasing works with respect to these registers for all ICH modes and provides exact programming instructions and sample code.
バージョン: 2009年1月
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White Paper: Fast Cryptographic Computation on Intel® Architecture Processors Via Function Stitching
It shows how stitching pairs of functions together in a fine-grained manner results in performance gains of 1.4X-1.9X (on IA processors) over applications perform functions sequentially.
バージョン: 2010年4月
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White Paper: High Performance Storage Encryption on Intel® Architecture Processors
This paper describes the performance characteristics of an optimized implementation of storage encryption (IEEE P1619), benefiting from the AES-NI instructions on Intel® processors.
バージョン: 001 : 2010年8月
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White Paper: Implementing Firmware on Embedded Intel® Architecture Designs - Firmware Design Guidelines
Know the technical issues to expect when building, debugging and deploying embedded firmware on an Intel® architecture system.
バージョン: 2009年1月
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White Paper: Increasing Memory Throughput with Intel® Streaming SIMD Extensions 4 (Intel® SSE4) Streaming Load
This white paper shows how the Intel® SSE4 Streaming Load instruction can be used to improve memory I/O throughput.
バージョン: 2008年11月
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White Paper: Intel® Quick Path Architecture
This white paper provides to Intel® QuickPath Architecture, a new platform ingredient for using scalable shared memory to maximize the performance of processors based on Intel® microarchitecture (Nehalem).
バージョン: 001
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White Paper: Motion Estimation with Intel® SSE4
This white paper describes how to optimize motion estimation algorithms using Intel® SSE4 instructions.
バージョン: 2007年4月
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White Paper: Optimizing
Non-Sequential
Data Processing
Applications
This paper outlines techniques for use on Intel® Architecture processors to lessen the effect of instruction pipeline stalls in certain application designs.
ファイルの種類 / サイズ: PDF 140KB
バージョン: 001 : 2010年3月
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White Paper: Platform Software Optimization for Multi-Core Architecture Processors
Making a successful transition to multi-core architecture requires software optimization. This paper presents platform-level optimizations that resulted in significant performance gains.
ファイルの種類 / サイズ: PDF 292KB
バージョン: 001 : 2009年5月
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White Paper: Using Intel® AES New Instructions and PCLMULQDQ to Significantly Improve IPSec Performance on Linux*
An AES-GCM implementation based on the AES-NI and PCLMULQDQ instructions delivered a 400% throughput performance gain when compared to a non-AES-NI enabled solution on the same platform.
バージョン: 001 : 2010年8月
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