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GLOSSARY
Definitions of terminology, including code-names, used on this site with convenient links to more information on embedded components, development tools, boards, technical references and design support.
| active management technology (Intel® Active Management Technology) |
Intel® AMT comprises a set of hardware-based remote management and maintenance capabilities that enable IT professionals to query, fix, and protect networked embedded devices, even when they are powered off, not responding or have software issues. A part of Intel® vPro™ technology, Intel® AMT helps perform remote asset tracking and checks the presence of management agents. Devices can be remotely turned on/off to reduce energy consumption during non-peak operating times.
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| Advanced Smart Cache (Intel® Advanced Smart Cache) |
The Intel® Advanced Smart Cache is a multi-core optimized cache that significantly reduces latency to frequently used data, thus improving performance and efficiency by increasing the probability that each execution core of a dual-core processor can access data from a higher-performance, more efficient cache subsystem.
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| advanced encryption standard instructions |
The Advanced Encryption Standard (AES) algorithm is now widely used across the software ecosystem to protect network traffic, personal data, and corporate IT infrastructures. Data protection or encrypting data—using mathematical algorithms to make data unreadable by unauthorized entities but reproducible by authorized entities—is frequently specified or recommended as a way to ensure that data can be best protected. Intel® AES-NI is a new instruction set for accelerating the encryption of data in the Intel® Xeon® processor 5600 series and the Intel® Core™ i5 processor 600 series. It is composed of seven new instructions that accelerate encryption and decryption, improve key generation and matrix manipulation, and aid in carry-less multiplication. Intel® AES-NI also helps alleviate the performance challenges inherent in cryptographic processing. |
| alignment |
PowerPC* instructions are all four bytes in size and must be aligned on four-byte boundaries. Intel® architecture instructions vary in size and therefore do not require alignment.
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| Arrandale |
Intel’s former processor code name of the Westmere-based mobile MCP (multi-chip package) in the Calpella platform (Intel® Core™ i7-620 processor or Intel® Core™ i5-520 processor paired with Intel® Mobile QM57 Express Chipset). Arrandale is comprised of a Hillel processor and the Ironlake GMCH (graphics & memory controller hub) in one package. Arrandale is the follow on to the Nehalem-based Auburndale MCP.
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| asymmetric multiprocessing |
Asymmetric multiprocessing (AMP) solutions partition hardware resources and run specific applications and operating systems in each partition. AMP is a good choice for CPU-bound applications that can be replicated across the cores without resource contention. Where applications are not well suited for parallelization, AMP can be a viable solution that benefits from the extra processing capabilities of Intel® multi-core processors.
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| Atom (Intel® Atom™ processors) |
The Intel® Atom™ processor is Intel's smallest processor, delivering the best performance per watt and lowest power IA experience.
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| Atom™ Processor D410 (Intel® Atom™ D410 desktop processor for embedded computing) |
The single-core Intel® Atom™ processor D410, based on Intel® 45nm process technology, features integrated graphics and memory controllers for robust performance. Intel® Embedded Flexible Design enables scalability for the first time on Intel Atom processors.
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| Atom™ Processor N450 (Intel® Atom™ N450 mobile processors for embedded computing) |
Based on Intel® 45nm process technology, the Intel® Atom™ processor N450 features single-core processing and Intel® Enhanced Deeper Sleep (C4/C4E) which reduces power consumption while the processor is idle.
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| Atom™ Processor D510 (Intel® Atom™ D510 desktop processor for embedded computing) |
Based on Intel® 45nm process technology, the Intel® Atom™ processor D510 features dual-core processing which performs full parallel execution of multiple software threads to enable higher levels of performance over the previous-generation Intel® Atom™ processor N270.
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| Avnet's* BOM Tool |
Avnet's* BOM Tool is an easy way to upload your BOM excel sheet on Avnet's* website and obtain information including manufacturer detail, datasheet, availability, and pricing on the part numbers specified in the BOM.
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| basic user (formerly referred to as "public") |
See registration.
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| bit fields |
The order of bit fields in memory can be reversed between architectures. Refer to the “Bit Fields and Bit Masks” section of the Endianness white paper for more details.
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| Boazman |
Intel’s former code name for the Intel® 82567 LAN chip, a GbE single-port PHY manufactured on 90nm process technology and used as part of the Intel® Atom™ Processors N450, D410 and D510 with Intel® 82801HM I/O Controller platform, formerly code-named Luna Pier.
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| Bromolow |
Bromolow is the former codename for the 2011 Intel® Embedded - scalable workstation platform. It is based on Intel® Xeon® Processor E3-1200 family and Intel® C206 chipset.
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| byte order |
Microprocessor architectures commonly use two different byte-ordering methods (little endian and big endian) to store the individual bytes of multi-byte data formats in memory. PowerPC is big endian and Intel architecture is little endian. Byte ordering also affects structures and unions. Refer to the endianness section of the PowerPC* to Intel® Architecture Migration white paper for more information.
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| Calistoga |
Calistoga is Intel's former code name for the Mobile Intel® 945GSE Express Chipset.
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| calling conventions |
Arguments are passed in registers for PowerPC. For Intel architecture, arguments are passed on the stack. Intel architecture has fewer registers than PowerPC, and local variables may be stored on the stack as well.
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| Calpella |
Intel’s former code name for the platform that combines the Intel® Core™ i7 Processor or Intel® Core™ i5 Processor (formerly Arrandale [Westmere 2C + Ironlake]) and Mobile Intel® QM57 Express Chipset (formerly Ibex Peak).
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| Cantiga |
Intel’s former code name for the Mobile Intel® GM45, Intel® GS45, and Intel® GL40 Express family of chipsets.
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| Celeron (Intel® Celeron® processors) |
Intel® Celeron® processors deliver exceptional value and reliability for basic computing requirements.
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| Celeron M (Intel® Celeron® M processors) |
The Intel® Celeron® M processors provide a balanced level of mobile-optimized processor technology, good performance and exceptional value for basic computing requirements.
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| Chief River |
Chief River is the former code name for the mobile embedded platform based on low power 3rd generation Intel® Core™ Processor family and Intel® 7 Series Chipset family.
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| Clarkdale |
Intel’s former code name for the Intel® Core™ i5-660 processor, the Intel® Core™ i3-540 processor and the Intel® Pentium processor G6950 which can be paired with the Intel® 3450 Chipset or the Intel® Q57 Chipset on the Foxhollow or Piketon based platforms. It is the 2-core mainstream desktop variant of Westmere on LGA-1156. Clarkdale is a MCP (Multi-Chip Product) with a Westmere 2 -core and Ironlake in a single package.
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| commercial temperature |
Intel® products designed to operate in the temperature range: 0 to +70 degrees C.
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| Core (2nd Generation Intel® Core™ processors) |
The next-generation Intel® microarchitecture code named Sandy Bridge manufactured entirely on Intel® 32nm process technology and implemented the Huron River and Sugar Bay platforms.
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| Core (Intel® Core™ microarchitecture) |
Intel® Core™ microarchitecture is the foundation for new Intel® architecture-based desktop, mobile, and mainstream server multi-core processors.
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| Core 2 (Intel® Core™2 processors) |
Intel® Core™2 processors include Intel’s 64-bit family of single core, dual core (Core™2 Duo) and quad core (Core™2 Quad) processors based on Intel® Core™ microarchitecture.
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| Core 2 Duo (Intel® Core™2 Duo processors) |
Based on Intel® Core™ microarchitecture, the Intel® Core™2 Duo processor family combines two independent processor cores in one physical package. The processors run at the same frequency and share up to 6 MB of L2 cache and up to 1333 MHz front side bus for truly parallel computing.
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| Core 2 Quad (Intel® Core™2 Quad processors) |
Based on Intel® Core™ microarchitecture, the Intel® Core™2 Quad processor family combines four processing cores, up to 12 MB of shared L2 cache and 1333 MHz front side bus to deliver amazing performance and power efficiency.
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| Cougar Canyon |
Cougar Canyon is Intel's name for the 2nd generation Intel® Core™ and Intel® Celeron® with the Mobile Intel® QM67/HM65 Express Chipsets customer reference board.
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| Cougar Point |
Cougar Point is the former code name for the Intel® 6 Series chipset family. Along with 2nd generation Intel® Core™ Processor family, it forms the basis for the 2011 Intel® Embedded Platforms – formerly code name Huron River and Sugar Bay.
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| Customer Reference Boards (CRBs) |
Intel’s reference design implementation that is fundamental to establishing design guidelines, demonstrating platform performance or determining suitability for specific applications. These reference designs may be made available to qualified customers upon request.
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| data type conversions |
Intel architecture and PowerPC perform differently for some data type conversions, such as converting floating-point type to integer data types.
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| Intel® Demand Based Switching |
Demand-based switching (DBS) is a power-management technology. See Enhanced Intel® Speedstep® Technology (EIST).
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| Development Kits |
Evaluation boards that provide a compelling experience for developers (kit may include documentation, peripherals, and/or software.)
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| Diamondville |
Diamondville is Intel's former code name for the Intel® Atom™ Processor N270.
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| divide by zero |
For integer divide-by-zero, PowerPC simply returns zero. On Intel architecture, executing this operation is fatal. Code should always check the denominator for zero before executing the divide operation. There is no difference in operation between PowerPC and Intel architecture floating point divide-by-zero.
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| drivers and libraries |
If a PowerPC driver or library comes from a third-party vendor, check with the vendor for equivalent Intel architecture products. If the PowerPC driver is developed in-house, the low level initialization will need to be updated for Intel architecture. Open source versions of the driver may help guide the changes that are required. Intel architecture chipset datasheets contain information about registers that need to be programmed. Intel® chipset drivers can be downloaded from the Intel Download Center. Navigate to Chipsets, then choose Embedded Chipsets. Intel® Embedded Graphics Drivers can be downloaded from Intel’s Embedded Graphics Drivers website. See Embedded Graphics. |
| Eaglelake |
Eaglelake is Intel's former code name for the Intel® Q45 Express Chipset.
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| early access program |
The Intel® Early Access program is a pre-launch relationship between Intel and program participants that enables both parties to produce high-quality products with leading technology. E-mail earlyaccesssupport@intel.com to learn more about the program.
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| ECC |
ECC is an acronym for error correcting code which is an error detection and correction feature of certain DRAM memory.
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| EFI | |
| e-Help |
Online electronic help is available for selected hardware platforms supported by Intel® Embedded Design Center.
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| embedded |
At Intel embedded computing refers to using Intel’s high performance platform solutions in non-traditional computing applications. In other words, embedded includes using Intel’s processor and chipsets in computing systems other than desktop, notebook, and typical server computers. Examples of embedded computing systems include gaming (such as casino lottery, arcade, and amusement games); in-vehicle infotainment (such as onboard entertainment devices in cars); retail point of sale devices (such as intelligent cash registers and ATM’s); industrial and home automation devices; energy management and control (such as smart grid technology); military, aerospace and government computing; telecommunications; medical (such as imaging, patient monitoring and portable devices); and digital signage. Intel® embedded architecture is the established leader in performance and innovation. Intel consistently offers a competitive roadmap of embedded products optimized for performance, power, and value with life cycle support up to 7 years. Some embedded platforms are also qualified for use conditions unique to embedded applications such as higher operating temperatures and lower power consumption. In addition Intel works within the embedded industry to drive standards-based computing systems. As a result equipment manufacturers are able to develop standards-based open architecture computing systems with lower overall costs. Developers can reduce expenses including minimizing capital and operating expenses and overall lower total cost of ownership. Platforms based on Intel® Embedded architecture enable you to simplify and standardize the IT environment and select from a broad range of industry standards-based platform solutions from multiple OEMs. Platform choices from multiple vendors provide the broadest range of innovative capabilities including support of multiple operating system environments. |
| Embedded Board Planner |
An interactive tool designed to iterate many board designs quickly including selecting a processor and chipset, peripheral
devices, board size, power budget, and thermal analysis.
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| embedded flexible design (Intel® Embedded Flexible Design) |
Intel® Embedded Flexible Design enables scalability for the first time on the Intel® Atom™ processors N450, D410 and D510 with Intel® 82801HM I/O Controller.
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| embedded graphics |
Intel® Embedded Graphics Drivers (IEGD) and Intel® Embedded Graphics and Media Driver (Intel® EMGD) specifically target the needs of embedded platform developers. Intel® Embedded Graphics Drivers (IEGD) and the Intel® Embedded Media Graphics Driver (Intel® EMGD) are two separate media and graphics drivers for embedded usage; Intel® EMGD is not a follow-on/next generation driver to IEGD. IEGD is a group of drivers that support a broad range of operating systems and chipsets. Please refer to each driver’s release notes, feature matrix, and product brief for the list of Intel® IEGD supported products and operating systems as it is different than Intel® EMGD.
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| Embedded Menlow (eMenlow) |
eMenlow is the former code name for validated Intel platform that combines the Intel® Atom Processor Z5xx Series(formerly code-named Silverthorne) with the Intel® System Controller Hub (formerly code-named Poulsbo).
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| embedded Menlow XL (eMenlow XL) |
The Intel® Atom™ processor Z5xx series is available in small form factor (13x14mm package) and large form factor (22x22mm package) versions. The Intel® System Controller Hub US15W is similarly available in small form factor (22x22mm package) and large form factor (37.5x37.5mm package) versions. Embedded Menlow XL (eMenlow XL) is the code name for the validated Intel platform that combines the large form factor versions of the Intel Atom Processor Z5xx Series (formerly code-named Silverthorne XL) and the Intel System Controller Hub (formerly code-named Poulsbo XL).
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| Embedded Product Advisor |
An interactive tool that recommends the right Intel® platform for your embedded system requirements.
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| Embedded Product Roadmap |
An interactive tool that displays Intel’s comprehensive embedded processor and chipset plans for performance, scalability, I/O-intensive computing and ultra-low power.
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| EMGD (Intel® EMGD) |
Intel® Embedded Graphics and Media Driver (Intel® EMGD). See Embedded Graphics.
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| endianness |
Endianness describes how multi-byte data is represented by a computer system and is dictated by the CPU architecture of the system. See byte order.
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| Intel® Enhanced Deeper Sleep (C4/C4E) |
Deep sleep (C3) and deeper sleep (C4) are terms used in the power management of mobile platforms, improving battery life by putting the CPU to "sleep" when not in use. C3 and C4 refer to ACPI power management states. See Thermal and Power Technology.
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| Enhanced Intel Speedstep® Technology (EIST) |
Enhanced Intel SpeedStep® Technology and demand-based switching allows the processor performance and power consumption levels to be modified while a system is functioning by separately adjusting processor voltage and core frequency. This results in decreased average power consumption and decreased average heat production while meeting performance requirements.
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| EP (as in Nehalem-EP) |
EP is an abbreviation for efficient performance.
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| EP80579 (Intel® EP80579 Integrated Processors) |
Based on Intel® architecture, the Intel® EP80579 Integrated Processor product line is the first in a series of breakthrough system on-a-chip (SOC) processors, delivering excellent performance-per-watt for small form factor designs formerly code named Tolapai.
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| Evaluation Boards |
Low cost development boards available for silicon evaluation.
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| Evaluation Platforms |
Intel offers a variety of evaluation platforms (such as Development Kits, Customer Reference Boards or Evaluation Boards) to simplify the design process and reduce time-to-market. Evaluation platforms may include: hardware (based on industry standards), firmware, software (including operating systems), reference designs, cables, and peripherals to enable developers in prototyping their solution, performance evaluation, or porting application software.
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| execute disable bit |
Execute disable bit is a hardware-based security feature that can reduce exposure to viruses and malicious code attacks and prevent harmful software from executing and propagating on the server or network.
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| extended temperature | |
| Extensible Firmware Interface (EFI) |
Intel promotes Extensible Firmware Interface (EFI) as a C language based modular firmware alternative to traditional BIOS. The EFI specification defines a model for the interface between operating systems and platform firmware. The interface consists of data tables that contain platform-related information, plus boot and runtime service calls that are available to the operating system and its loader. Together, these provide a standard environment for booting an operating system and running pre-boot applications. See Intel’s EFI website for more information on the EFI specification. The Unified EFI Forum (UEFI), was formed to manage and promote the EFI specification, and EFI was renamed to UEFI. Visit the UEFI website for more information.
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| Firmware hub (Intel® 82802 Firmware Hub Device) |
The Intel® 82802 Firmware Hub Device (FWH) includes a 5-signal communication interface used to control the operation of the device in a system environment. Buffers for this interface are designed to be PCI-compliant.
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| Fort Sumter |
Intel’s former code name for the customer reference board based on the Intel® Core™ i7 Processor or Intel® Core™ i5 Processor and Mobile Intel® QM57 Express Chipset; supports ECC.
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| Foxhollow |
Foxhollow is Intel's former code name for the platform that combines the Intel® Core™ i5 Processor or Intel® Core™ i3 Processor or Intel® Pentium® or Intel® Xeon® Processor and Intel® 3450 Chipset. A Foxhollow platform system contains either a Lynnfield (Nehalem 4C) or Clarkdale (Westmere 2C + Ironlake) processor and Ibex Peak chipset.
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| FWH |
| hardware platform |
See platform.
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| HDMI | |
| high-definition audio (Intel® High-Definition Audio) |
Intel® HD Audio is Intel's next-generation architecture for implementing audio, modem and communications functionality. As an integrated controller, it supports multimedia applications and differentiation through the use of a variety of third-party audio codecs.
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| high-definition multimedia interface |
A digital interface used for transmitting uncompressed video and audio data.
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| Huron River |
Huron River is the former code name for the embedded platform based on low power 2nd generation Intel® Core™ Processor family and Intel® 6 Series Chipset family.
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| HT | |
| Hyper-Threading Technology |
Hyper-Threading Technology enables thread-level parallelism on each processor resulting in more efficient use of processor resources–higher processing throughput–and improved performance on today's multithreaded software. Hyper-Threading Technology requires a computer system with an Intel® processor supporting Hyper-Threading Technology and a Hyper-Threading Technology-enabled chipset, BIOS and operating system.
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| Ibex Peak |
Ibex Peak is Intel's former code name for a PCH used on Nehalem mobile and desktop platforms. It is a successor of ICH10 which includes the Intel® Series 5 Chipsets and Intel® 3400 Series Chipsets.
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| IEGD |
Intel® Embedded Graphics Drivers (IEGD). See Embedded Graphics.
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| industrial (or extended) temperature |
Intel® products designed to operate in the temperature range: -40 to +85 degrees C.
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| input/output controller 82801HM (Intel® 82801 HM I/O Controller) |
The Intel® 82801 HM I/O controller provides rich I/O capabilities and flexibility with high-bandwidth interfaces such as PCI Express*, PCI, Serial ATA, and Hi-Speed USB 2.0. It includes a single channel for DDR2 system memory and an Intel® High Definition Audio interface.
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| input/output controller ICH8M |
Intel’s former name for the Intel® 82801HM I/O controller used on the Intel® Atom™ processors N450, D410 and D510 with Intel® 82801HM I/O Controller platform, formerly code-named Luna Pier.
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| instructions |
PowerPC and Intel architecture instructions differ. For some instructions there is no one- to-one equivalent. Refer to the assembly code section of the PowerPC* to Intel® Architecture Migration white paper for the appropriate Intel® Software Developer Manuals, instruction set information and tools that may assist the assembly code migration.
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| Intel® Architecture Software Developer’s Manuals |
The Intel® Architecture Software Developer’s Manual, Volume 1 describes the basic architecture and programming environment of an Intel architecture processor. The Intel® Architecture Software Developer’s Manual, Volume 2, describes the instruction set of the processor and the opcode structure. These two volumes are aimed at application programmers who are writing programs to run under existing operating systems or executives. The Intel® Architecture Software Developer’s Manual, Volume 3 describes the operating system support environment of an Intel architecture processor, including memory management, protection, task management, interrupt and exception handling, and system management mode. It also provides Intel architecture processor compatibility information. This volume is aimed at operating-system and BIOS designers and programmers. Intel® 64 and IA-32 Architectures Software Developer's Manuals.
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| Intelligent Power (Intel® Intelligent Power Technology) |
Intel® Intelligent Power Technology reduces idle power consumption through architectural improvements such as integrated power gates and automated low-power states.
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| Intelligent Systems |
Intelligent Systems are securely managed electronic systems that run a high-level operating system and autonomously connect to the internet, execute native or cloud-based applications, and analyze data collected.
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| Intelligent Systems Alliance |
The Intel® Intelligent Systems Alliance is a global ecosystem of 200+ members that collaborates closely with Intel and each other to provide developers with intelligent hardware, software, tools, and services. From modular components to market-ready systems, the members of the Alliance provide developers with solutions that help them advance innovation with the latest technology and speed smart, connected systems to market.
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| Intel® I/O Acceleration Technology |
Intel® I/O Acceleration Technology (Intel® I/OAT), a component of Intel® Virtualization Technology for Connectivity, improves data flow across the platform to enhance system performance. The Intel® I/OAT implements system wide enhancements ensure that the data gets to and from applications consistently faster and with greater reliability.
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| Interactive Tools |
A suite of tools that make designing easier and faster. See Embedded Board Planner, Embedded Product Advisor and the Embedded Product Roadmap.
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| Ivy Bridge |
Ivy Bridge is the former code name for the 3rd Generation Intel® Microarchitecture manufactured on the industry leading 22nm process technology offering superior performance, enhanced media and graphics capabilities and flexibility. See Maho Bay or Chief River for specific platform information.
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| Los Lunas | |
| low power |
Low power is an embedded Intel roadmap vector that focuses on applications that have either tight thermal constraints or require smaller form factors. These platforms are generally mobile PC class products (Mobile/Notebook/Netbook), including the newest ultra low power Intel® Atom™ processor family.
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| Luna Pier |
Luna Pier is Intel's former code name for the Intel® Atom™ processors N450, D410 and D510 with Intel® 82801HM I/O Controller platform.
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| Lynnfield |
Intel’s former code name of a Nehalem based quad-core desktop processor, and initially released as the Intel® Core™ i5-750, Core™ i7-860, and Core™ i7-870 processors as well as the Intel® Xeon® X3400 processor series. It is designed for the Foxhollow and Piketon platforms with the Ibex Peak chipset. Lynnfield contains the Nehalem Core and Uncore elements, and a reduced version of the Thurley platform MCH (Tylersburg) in the same package (called the IIO). The QuickPath link between the Core/Uncore elements and the IIO is also internal.
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| Maho Bay |
Maho Bay is the former code name for the scalable embedded platform based on 3rd generation Intel® Core™ Processor family and Intel® 7 Series Express Chipset family.
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| material declaration data sheets (MDDS) | |
| Menlow |
See eMenlow.
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| McCreary |
Intel’s former code name for validated Intel platform that combines Intel® Core™2 Quad Processor Q9400 (formerly code-named Yorkfield) or Intel® Core™2 Duo Processor E8400 (formerly code-named Wolfdale) with Intel® Q45 Express Chipset (formerly code-named Eaglelake).
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| Montevina |
Intel’s former code name for validated Intel platform that combines Intel® Core™2 Duo, Intel® Celeron® and Intel® Celeron® M processors (formerly code-named Penryn family) with Mobile Intel® GM45, Intel® GS45, and Intel® GL40 Express Chipset (formerly code-named Cantiga family).
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| Moon Creek |
Moon Creek is Intel's name for the Intel® Atom™ processors N450, D410 and D510 with Intel® 82801HM I/O Controller customer reference board.
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| Moore’s Law |
First articulated by Intel co-founder Gordon Moore, Moore’s Law states that the number of transistors on a chip will double about every two years.
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| motherboard |
A printed circuit board (PCB) used to support and electrically interconnect electronic devices such as the processor, chipset, memory, I/O devices, etc. In embedded computing
the motherboard is generally the primary PCB which may also include ancillary PCB’s (daughter-boards, i.e. WIFI, mezzanines, etc.).
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| Intel® Multi-Core Technology |
By incorporating multiple processor execution cores in a single package, Intel® Multi-Core Technology delivers full parallel execution of multiple software threads. This enables higher levels of performance while using same power typically required by higher frequency single core processor. Intel® Multi-Core Technology along with Intel® Virtualization Technology enables platform consolidation, and increase system utilization and performance.
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| Navy Pier |
Intel’s former code name for validated Intel platform that combines Intel® Atom™ Processor N270 (formerly code-named Diamondville) and Mobile Intel® 945GSE Express Chipset (formerly code-named Calistoga).
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| Nehalem-EP |
Nehalem-EP is Intel's former code name for the Intel® Xeon® Processor 5500 series.
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| Palomar |
Intel's code name for the customer reference board based on the Intel® Core™ i5 or Intel® Core™ i3 or Intel® Pentium® or Intel® Xeon® Processors and Intel® 3450 Chipset.
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| Panther Point |
Panther Point is the former code name for the Intel® 7 Series chipset family. Along with 3rd generation Intel® Core™ Processor family it forms the basis for the 2012 Intel® Embedded Platforms formerly code named Chief River and Maho Bay.
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| Patsburg |
Patsburg is the former code name for the Intel® C600 Series chipset family. Along with Intel® Xeon® processor E5-2600 series, it forms the basis for the 2012 Intel® Intelligent System Platform – formerly code name Romley.
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| Penryn |
Intel’s former code name for Intel® Core™2 Duo T9400/SL9400/SU9300/SP9300, Intel® Celeron® and Intel® Celeron® M ULV 722 processors
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| Pentium (Intel® Pentium® processors) |
Intel® Pentium® processorsinclude a family of Intel® processors that delivers great performance, low power enhancements and multitasking for everyday computing.
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| Pentium M (Intel® Pentium® M processors) |
Intel® Pentium® M processorsare based on Intel's initial mobile processing technology designed specifically for notebooks to deliver great mobile performance and low power enhancements.
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| performance |
Performance is an embedded Intel roadmap vector that supports processors and chipsets focused on high compute performance, dual processor, data integrity features, large memory footprint and high I/O throughput. It includes many of the enterprise and server platforms as well as mobile processors paired with server class chipsets.
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| Picket Post |
Picket Post is the former code name of the Intel® Xeon® Processor C5500/C3500 Series with the Intel® 3420 Chipset and is based on the Intel® Xeon® Processor (formerly Jasper Forest) and the Intel® 3420 Chipset (formerly Ibex Peak).
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| Piketon |
Intel’s former code name for the platform based on the Intel® Core™ i7 Processor or Intel® Core™ i5 Processor or Intel® Core™ i3 Processor or Intel® Pentium® Processor and Intel® Q57 Chipset. A Piketon platform system contains either a Lynnfield (Nehalem 4C) or Clarkdale (Westmere 2C + Ironlake) processor and Ibex Peak chipset.
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| Pineview-D (Pineview Desktop) |
Pineview Desktop is Intel's former code name for the Intel® Atom™ processor D410 or Intel® Atom™ processor N510.
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| Pineview-M (Pineview Mobile) |
Pineview Mobile is Intel's former code name for the Intel® Atom™ N450 processor.
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| platform |
A platform is a validated combination of an Intel® processor with an Intel® chipset. See embedded supported hardware platforms.
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| power management technologies |
Intel's power management technologies enable systems to strike the right balance between computing performance needs and power consumption by automatically adjusting the power state to use only the energy required by the workload. The Intel® power technologies comprises of Enhanced Intel® SpeedStep® Technology, Intel® Turbo Boost Technology and Dynamic FSB frequency switching mechanism.
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| private user |
See registration.
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| privileged user (formerly referred to as "private") |
See registration.
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| Poulsbo |
Poulsbo is Intel's former code name for the Intel® System Controller Hub.
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| processor number |
Once you have decided on the processor brand family that is right for your design, Intel processor numbers allow you to quickly differentiate among processors within that product family. The numbers are based on a variety of features that may include the processor's underlying architecture, cache, front side bus (FSB), clock speed, power and other Intel® technologies.
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| product change notifications (PCN) | |
| product discontinuance notifications (PDN) | |
| public user |
See registration.
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| quality document management system (QDMS) |
Intel® Quality Document Management System (QDMS) Search, view, and download Material Declaration Data Sheets (MDDS), Product Change Notifications (PCN), including Product Discontinuance Notifications (PDN), for Intel products.
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| Queens Bay |
Queens Bay is the former code name of the Intel® Atom™ Processor E6xx Series with Intel® Platform Controller Hub EG20T and is based on Intel® Atom™ processor (formerly Tunnel Creek) and Intel® Platform Controller Hub.
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| QuickAssist (Intel® QuickAssist Technology) |
Intel® QuickAssist Technology is a comprehensive initiative to optimize the use and deployment of accelerators on Intel® architecture platforms. Also see Intel® EP80579
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| real-time operating system |
An real-time operating system supports deterministic performance, which can be defined as a guaranteed response within a set period of time. Real-time operating systems are often used in embedded systems to achieve optimized performance, enabled by low interrupt latency and rapid context switching.
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| Red Fort |
Intel’s former code name for the customer reference board based on the non-ECC versions of the Intel® Core™ i7 Processor or Intel® Core™ i5 Processor and Mobile Intel® QM57 Express Chipset.
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| registration |
The Basic User level provides open access to public content on the site. Registering as a Basic User lets you share ideas and insights and collaborate with other members of the Intel® embedded community. The Privileged User level provides Basic User benefits plus password-protected access to Intel confidential technical content content such as schematic files, simulation models, technical trainings, electronic support, free hardware test tools, and much more. |
| Remote labs |
Users can establish a secure remote connection to physical platform hardware enabling test, evaluation and optimization of Intel® architecture.
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| roadmap |
The embedded Intel roadmap includes product platforms for embedded design that have long life support (7 yrs). There are three main roadmap vectors: performance, scalability and low power.
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| Romley |
Romley is the former codename for the 2012 Intel® Xeon® processor E5-2600 series with Intel® C604/C602-J chipset based platform.
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| RTOS |
| Sandy Bridge |
Sandy Bridge is Intel's former code name for the Intel® Microarchitecture which is introduced in the 2nd generation Intel® Core® Processor family, Intel® Xeon® processor E3-1200 series and Intel® Xeon® processor E5-2600 series. See Sugar Bay, Huron River, Bromolow or Romley for specific platform information.
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| scalable |
Scalability is an embedded Intel roadmap vector that focuses on applications that can benefit from the flexibility of using multiple processors in a single board design. Products scale vertically to offer multiple price and performance options and horizontally from one processor generation to the next. These platforms are generally desktop PC class products.
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| signal processing |
Signal processing is an area of electrical engineering and applied mathematics that deals with operations on or analysis of signals, in either discrete or continuous time, to perform useful operations on those signals. Signals are analog or digital electrical representations of time-varying or spatial-varying physical quantities.
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| Silverthorne |
Silverthorne is Intel's former code name for the Intel® Atom™ Processor Z5xx Series.
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| SOC |
SOC is the abbreviation for system-on-a-chip, see Intel® EP80579 Integrated Processor.
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| software development tools |
Understanding the needs and availability of tools for the new platform is important when investigating the requirements of the port. Keep in mind that software development tools, as with all software applications, have system requirements. The tool must support the target processor and operating system. See the Development Tools for Embedded Intel® Architecture FAQ for more information, or visit the Intel® Software Development Products website for more details.
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| SpeedStep® Technology |
The conventional SpeedStep® Technology switches both voltage and frequency in tandem between high and low levels in response to processor load. Enhanced Intel SpeedStep® Technology is an advanced means of enabling very high performance while also meeting the power-conservation needs of mobile systems.
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| Intel® Stable Image Platform Program (SIPP) |
Intel® SIPP aligns and stabilizes key Intel platform components, assisting in lowering total cost of ownership. By enabling a predictable transition from one technology generation to the next, the need for required driver changes or "new hardware found" events between annual technology transitions is reduced. The ability to better maintain a standardized software image for the duration of an Intel SIPP cycle is enhanced.
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| step-by-step |
Step-by-Step is a step-based design guide on the Intel® Embedded Design Center (Intel® EDC) that enables embedded developers to Explore, Evaluate, Design and Build embedded applications.
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| Streaming SIMD Extensions 2 (Intel® Streaming SIMD Extensions 2 [SSE2]) |
Intel® Streaming SIMD Extensions (SSE) 2 enables software to accelerate data processing in specific areas, such as complex arithmetic and video decoding, by extending MMX instructions to operate on XMM registers.
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| Streaming SIMD Extensions 3 (Intel® Streaming SIMD Extensions 3 [SSE3]) |
Intel® SSE3, an extension of SSE2, enables software to accelerate data processing by working horizontally in a register, as opposed to the more or less strictly vertical operation of all previous SSE instructions.
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| structures and unions |
The fields in a structure can be sensitive to the defined order. Structures must either be properly ordered or directly accessed by the field name.
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| Sugar Bay |
Sugar Bay is the former code name for the embedded platform based on scalable 2nd generation Intel® Core™ Processor family and Intel® 6 Series Express Chipset family.
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| Supplemental Streaming SIMD Extensions 3 (Intel® Supplemental Streaming SIMD Extensions 3 [SSSE3]) |
Intel® SSE3, an extension of SSE3, contains 16 new discrete instructions (that can act on 64-bit MMX or 128-bit XMM registers) over SSE3, enabling software to accelerate data processing.
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| symmetric multiprocessing (SMP) |
SMP operating systems treat all cores as equals and distribute the workload/processing to the available cores. An SMP design is an efficient way to take advantage of multi-core hardware. It can be written to scale performance automatically as the number of processing cores increases. More operating systems are now providing SMP, including embedded RTOSs, but SMP requires code to be architected to take advantage of parallelization with multiple CPUs. For situations where applications are not well suited for parallelization, asymmetric multiprocessing (AMP) could be a better solution to benefit from the extra processing capabilities of multi-core hardware.
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| system initialization firmware |
Every embedded Intel architecture design must include a firmware stack that initializes CPU cores, memory, IO, peripherals and often graphics. It may also include respective diagnostic routines. In any case, the initialization gets the system to a point where the operating system can load. PowerPC systems use home-grown boot loaders, but achieving system initialization on Intel architecture is easy for situations where developing a home-grown boot loader is less desirable. See the Firmware and BIOS for Embedded Intel® Architecture FAQ for more details.
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| TDP |
See thermal design power.
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| thermal design power |
TDP is the power dissipation target for thermal solution design, based on a realistic-worst case application running at the maximum component temperature. Note: thermal design power is not maximum power.
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| Thunderbolt™ Technology |
Developed by Intel (under the code name Light Peak), and brought to market with technical collaboration from Apple*. Thunderbolt™ technology is a new, high-speed, dual-protocol I/O technology designed for performance, simplicity, and flexibility.
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| Tolapai |
Tolapai is Intel's former code name for the Intel® EP80579 Integrated Processor, a system-on-a-chip (SOC).
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| Topcliff |
Topcliff is Intel's former code name of the Intel® Platform Controller Hub EG20T. It along with Intel® Atom™ processor E6xx series (formerly Tunnel Creek) forms the Queens Bay platform.
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| trusted execution (Intel® Trusted Execution Technology) |
Intel® Trusted Execution Technology (Intel® TXT), formerly code-named LaGrande Technology, is a versatile set of hardware extensions to Intel® processors and chipsets that enhance the digital office platform with security capabilities such as measured launch and protected execution.
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| Tunnel Creek |
Tunnel Creek is the former code name of the Intel® Atom™ processor E6xx Series. It along with Intel® Platform Controller Hub EG20T (formerly Topcliff) forms the Queens Bay platform.
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| Turbo Boost (Intel® Turbo Boost Technology) | |
| Tylersburg-EP |
Tylersburg-EP is Intel's former code name for the platform based on the Intel® Xeon® Processor 5500 Series and the Intel® 5520 Chipset.
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| UEFI |
| vector oriented instructions |
PowerPC uses AltiVec* instructions. Intel architecture uses streaming SIMD extensions (SSE). Refer to the vector oriented code section of PowerPC* to Intel® Architecture Migration white paper for details about migrating AltiVec to SSE instructions.
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| Virtualization (Intel® Virtualization Technology) |
Intel® Virtualization Technology (Intel® VT) provides maximum system utilization by consolidating multiple environments into a single server or PC. Hardware–based Intel® VT improves the fundamental flexibility and robustness of traditional software–based virtualization solutions by accelerating key functions of the virtualized platform.
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| Virtualization for Connectivity (Intel® Virtualization Technology for Connectivity) |
Intel® Virtualization Technology for Connectivity (Intel® VT-c) is collection of I/O virtualization technologies that improves overall system performance by improving communication between host CPU and I/O devices within the virtual server. This enables a lowering of CPU utilization, a reduction of system latency and improved networking and I/O throughput.
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| Virtualization for Directed I/O (Intel® Virtualization Technology for Directed I/O) |
Intel® Virtualization Technology for Directed I/O (Intel® VT-d) extends Intel's Virtualization Technology (VT) roadmap by providing hardware assists for virtualization solutions. Intel® VT-d adds support for I/O-device virtualization to help end users improve security and reliability systems and improve performance of I/O devices in a virtualized environment.
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| vPro (Intel® vPro™ technology) |
Intel® vPro™ enables IT personnel to take advantage of hardware-assisted security and manageability capabilities through Intel® Active Management Technology (Intel® AMT), Intel® Virtualization Technology (Intel® VT) and Intel® Trusted Execution Technology (Intel® TXT). Together, these technologies deliver unprecedented hardware support for advanced management functions, virtualization and platform security.
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| VT |
See virtualization.
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| Westmere |
Formerly referred to as Nehalem-C, is the code name of a processor. It is the P1268 (32 nm) compaction of Nehalem. Gulftown is high-end server version on LGA-1366. Clarkdale is the mainstream version on LGA-1156. Arrandale is the mobile version.
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| Wide Dynamic Execution (Intel® Wide Dynamic Execution) |
Intel® Wide Dynamic Execution is a combination of techniques (data flow analysis, speculative execution, out of order execution, and super scalar) that improves performance and efficiency as each core can complete up to four full instructions simultaneously using an efficient 14-stage pipeline.
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| Wolfdale |
Wolfdale is Intel's former code name for the Intel® Core™2 Duo Processor E8400.
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| Yorkfield |
Yorkfield is Intel's former code name for the Intel® Core™2 Quad Processor Q9400.
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| 2nd Generation Intel® Core™ processors |
The next-generation Intel® microarchitecture code named Sandy Bridge manufactured entirely on Intel® 32nm process technology and implemented the Huron River and Sugar Bay platforms.
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| 64-bit (Intel® 64) |
Intel® 64 architecture delivers 64-bit computing on server, workstation, desktop and mobile platforms when combined with supporting software. Intel 64 architecture improves performance by allowing systems to address more than 4 GB of both virtual and physical memory. Intel 64 provides support for 64-bit flat virtual address space, 64-bit pointers, 64-bit wide general purpose registers, 64-bit integer support and up to one terabyte (TB) of platform address space.
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Related Information
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Resource Brief: Intel® Embedded Design Center
Use the Intel® EDC for one-stop shop for technical design resources and support for embedded designs.
File Type/Size: PDF 1,005KB
Version: 001US : February 2010
Step-by-Step
The Intel® EDC provides the resources you need for each step from platform selection and evaluation to design.
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