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- In Chapter 2, on page 25, in the bottom row of the graph showing four-way SIMD parallel instruction arithmetic, replace "a2-b3" with "a2-b2."
- In Chapter 2, on page 38, speeds for the 1.5 GHz processor are identified as speeds for the 3 GHz processor. Theoretical peak performance of the Intel® Pentium® 4 processor 3 GHz is 12 GFLOPS for single-precision and 6 GFLOPS for double-precision.
- In Chapter 5, on the bottom of page 94, replace "constants -1 and -17" with "constants -1 and 17."
- In Chapter 9, on page 209, in the top row of Table 9.5, change "BLOCK LOOP WAS VECTORIZED" to read "BLOCK WAS VECTORIZED."
- In Chapter 5, in the middle of page 94, add "T" to the expansion table entries for "pcmpeq"; should be "pcmpeqT" in columns -1 and 1. At the bottom of the same page, the instruction should be "pcmpeqd" in the first column of the code sample.
- In Chapter 5, page 112, table, != row, no pcmpne [b,w,d] instructions exist, but these are emulated by negating EQ instead.
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