Page 23, first pseudo-code segment

The comment doesn't match the following line of code:

   write_local_mem_addr_1(7); Write addr 32 with value 5

Instead, the line and comment should read:

   write_local_mem_addr_1(7); Write addr 32 with value 7

Or, depending on your preferences for the numbers 5 and 7, the line of code could be the following;

   write_local_mem_addr_1(5); Write addr 32 with value 5

Page 189, first sentence of section on "Sequence Number Assignment"

The next step in our blocking reordering algorithm....

But should read:

The next step in our non-blocking reordering algorithm...

Page 191, Figure 7.5

The decision box labeled "seq < exp_seq + N" has the "yes" and "no" branches reversed. That is, when the sequence number is less than the expected sequence number plus N (the size of the AISR), the packet should be inserted in the AISR. Otherwise, the flowchart for (A) should be followed.

Page 329, Second paragraph in Flow Control and Multiple Ports Sidebar

The sentence beginning:

   "In particular, the receive driver needs to read flow control ..."

Should read:

   "In particular, the transmit driver needs to read flow control..."

On the CD-ROM, Chapter05/dispatch_loop/system_init.c

The file system_init.c in the Chapter05 dispatch_loop directory contains microengine assembly code, not microengine C code as the file extension would imply. This file is unused by any of the projects in the book. Instead, the microengine C code for system initialization is in the file system_init.h, where it could be inlined for performance reasons.

Page 135 all transmit code in Chapters 5, 11, and 12. In addition, CD files as cited here:

Affected CD-ROM files are:
Line 249, Chapter05/spi4_tx.c,
Line 235, Chapter05/spi4_tx.uc,
Line 298, Chapter11/spi4_tx.c,
Line 270, Chapter11/spi4_tx.uc,
Line 370, Chapter12/csix_tx.c
Line 354, Chapter12/csix_tx.uc

The code that calculates the number of used TBUF elements is incorrect for the case when the last transmit sequence number is greater than the current transmit sequence number. Instead of calculating:

// Compute how many TBUFs have been consumed since
// the last read. Account for wrap around
.if (io_last_tx_seq <= cur_tx_seq)
   sub(tbufs_used, cur_tx_seq, io_last_tx_seq)
.else
   sub(tbufs_used, io_last_tx_seq, cur_tx_seq)
.endif

The calculation for the "else" clause should properly account for the transmit sequence number roll-over with the following code:

// Compute how many TBUFs have been consumed since
// the last read. Account for wrap around
.if (io_last_tx_seq <= cur_tx_seq)
   sub(tbufs_used, cur_tx_seq, io_last_tx_seq)
.else
   add(tbufs_used, 256, cur_tx_seq)
   sub(tbufs_used, tbufs_used, io_last_tx_seq)
.endif

In microC, the corrected code appears as:

// Compute how many TBUFs have been consumed since
// the last read. Account for wrap around
if (*io_last_tx_seq <= cur_tx_seq)
{
     tbufs_used = cur_tx_seq - *io_last_tx_seq;
}
else
{
    tbufs_used = (256 + cur_tx_seq) - *io_last_tx_seq ;
}

Chapter 6 ethernet.c line 23 and Chapter 9 ethernet.c Line 24. On the CD-ROM, the program code in both files contains a typographical error.

The line that reads:

#define MAX_ETHERNET_LENGTH 158

should read:

#define MAX_ETHERNET_LENGTH 1518

Chapter 6 and Chapter 9 sample code on the CD

The microengine assembly versions of the ethernet_strip_header macro in Chapters 6 and 9 are incorrect. In the Chapter 6 version of the ethernet.uc file, the following code appears on line 260:

dl_meta_get_offset(offset)
dl_buf_get_data(header_addr, dl_buf_handle)
dram_read($$header[0], header_addr, 8, 1, header_sig, SIG_NONE, no_option)

A line of code should be added so that this code reads like this:

dl_meta_get_offset(offset)
dl_buf_get_data(header_addr, dl_buf_handle)
add_shf_left(header_addr, header_addr, offset, 0)
dram_read($$header[0], header_addr, 8, 1, header_sig, SIG_NONE, no_option)

This same sequence occurs in the Chapter 9 version of the ethernet.uc file at line 277, and the same change should be made there as well.

In both cases, the original code ignores any padding that may have been placed in front of the packet data in the buffer when reading the Ethernet type. The added line resolves this issue.

CD Sample programs for Chapter 7

Chapter07\dispatch_loop\dl_source.c

In the routine dl_source_init(), the processing dispatch loop should have all threads wait for the signal that the receive-to-processing ring is ready.

The existing code looks like:

void dl_source_init()
{
  if (ctx() == 0)
{
#ifdef PROCESSING_DL
  // Wait for a signal from RX indicating the
  // incoming ring is ready
  wait_for_all(&rx_ring_ready_sig);
#endif

#ifdef TX_DL
  // Wait for the queue to be set up
  wait_for_all(&tx_ring_ready_sig);
#endif
  }
}

The correct code should be like this:

void dl_source_init()
{
#ifdef PROCESSING_DL

  // Wait for a signal from RX indicating the
  // incoming ring is ready
  wait_for_all(&rx_ring_ready_sig);

#endif

#ifdef TX_DL
  if (ctx() == 0)
  {
  // Wait for the queue to be set up
  wait_for_all(&tx_ring_ready_sig);
  }
#endif
}

This code change prevents a race condition with threads 1 - 7 of the microengines executing the processing code could access the receive-to-processing dispatch ring before it is initialized.

Chapter 6, Page 171, listing at the bottom of the page

The routine named Ethernet_cc_init() from the file init.cc. This code is not available on the CD-ROM or on the Intel Web site. For the latest information and examples on core component source code, please refer to the IXA SDK documentation.