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Intel Developer Forum presents a unique chance to listen to keynotes and to participate in technical seminars, detailed training courses and labs developed by Intel specialists and leading experts of the industry. You will get a chance to see wireless infrastructure in action, to visit Intel Solutions Conference, meet with industry leaders and visit the Technology Exhibit.

October 19
October 20



Sponsors' sessions


(XP1) Hitachi: The Changing Face of the Storage Market: - a Hard Drive Vendor's View
Presenter: John Fox Hitachi Global Storage Technologies

    The hard disk drive industry is back on track with significant growth predicted for the next five years and beyond. But where is this growth expected to come from and what are the challenges ahead? Gain an insight into Hitachi's technology and strategy in this sometimes turbulent industry


(XP2) NVIDIA solutions for PCI Express
Presenter: Alain Tiquet NVidia, Director of marketing, EMEA


(XP3) Oracle Developer Seminar: Instrumental Environment for Java Application Development (Oracle JDeveloper)
Presenter: Alexey Salnikov, Oracle CIS, Senior Consultant



(XP4) iRU™ Speech: Mobility as the way to increase effectiveness of your business
Presenter: Dmitry Abramov, iRU™, Marketing Director


(XP6) HP sponsor speech
Presenter: Oleg Vaskov, HP


(XP7) Network Appliances speech



Intel Research and Development


(RD2) Universal 3D "the JPEG for 3D data"
Presenters: Russel Hodgin, Intel; Alexander Majorov, Intel
PDFDownload [PDF 6.28MB]

  • The purpose and vision behind the Universal 3D (U3D) format for repurposing 3D CAD data in downstream applications.
  • A description of features and cost-effective benefits unique to the U3D Open File Format.
  • An overview of the file format specification, runtime libraries, and extensibility mechanism.
  • An update on the 3D Industry Forum (3DIF) and Ecma TC43 standardization efforts of U3D.


(RD3) Intel's 65 nm Logic Technology: Continuing Moore's Law in a Power Limited World
Presenter: Josh Walden, Intel, Fab24 Plant Manage
PDFDownload [PDF 10.5MB]


(RD4) Helper Threads for Breaking the Memory Wall
Presenter: Victor Samofalov, Intel
PDFDownload [PDF 3.65MB]


(RD5) Pathway to Adaptive and Cognitive Radios for Efficient Wireless Operation
Presenter: Dmitry Akhmetov, Intel, SW engineer, wireless research
PDFDownload [PDF 8MB]

    In this session Intel will present the Adaptive Radio Architecture, a research software framework supporting any combination of radios including reconfigurable and cognitive radios, and describe usage scenarios in dense network, seamless handoff, and cross layer optimization in a mobile router solution developed by the Cisco Technology Center. Well also describe the relevant industry standards like 802.11k (Radio Resource Management), 802.21 (Media Independent Handoffs), and how they apply to the architecture. In the second half of the course we will indicate how the ARA framework supports Cognitive Radios, devices which improve communications within existing unlicensed bands and show how this technology is allowing regulatory bodies to reuse allocated spectrum for new purposes while protecting existing incumbent users.



"Systems" Labs


(LB1) Basic techniques of using Intel® VTune™ Performance Analyzer: Sampling and Call Graph
Presenter: Dmitriy Tarakanov, Intel

    At the successful completion of this lab, you will be:
     – Familiar with sample-based profiling and the VTune™ analyzer user interface.
     – Familiar with Call Graph in the VTune™ analyzer.
     – Familiar how use these features together.


(LB2) Intel Compiler 8.1, get leading performance
Presenter: Maxim Locktyukhin, Intel, Technical Consulting Engineer

    Lab intends to show step-by-step how to use features of Intel Compiler, on the example of recently released (Xeon, and Prescott 3.x0F) Intel processors with EM64T. Lab starts with using binary compiled by Microsoft compiler. Then step-by-step we add use of compiler features we will gain about 30-40% performance boost


(LB3) Code-Coverage and Test-Prioritization Tools
Presenter: Yaroslav Morkovnikov, Intel
PDFDownload [PDF 2.74MB]

    This lab demonstrates how to use Intel Compiler tools for code-coverage assessment and apllication analysis, testing kit prioritization according the execution time and code-coverage.


(LB4) Develop multithreading applications and win using the unique capabilities of Intel Threading Tools.
Presenter: Victoria Gromova, Intel

    Lab demonstrates how Intel® Threading Tools may help you make your program thread safe and analyze performance of threaded applications:
     – using Intel® Thread Checker to detect data races and deadlocks in multi-threaded applications  – performance analysis of multi-threaded applications with Thread Profiler: finding performance-critical segments of threaded execution flow


(LS1) Creating value with architecture innovations that leverage web services
Presenters: Rajagopal A, Intel; Manjula Vidyanandarao, Intel

    This session is designed to empower you to architect next generation of internet applications that leverage web services technology. With help of demos, we will learn how one can derive value for your business and customers by leveraging this technology. Participants will gain hands-on experience in architecting & developing web service oriented internet solutions. The session ends with providing architecture guidelines and reference templates that participants can take home & use it to generate value.



Hardware


(HW1) Future memory technologies for PC industry
Presenter: Sergey Shevchenko, Intel
PDFDownload [PDF 9.01MB]

  • Understanding of Intels Platform Memory Technology Roadmap.
  • Status of enabling efforts for DDR2 667/800
  • Performance benefits of DDR2 for desktop, workstation, servers, and mobile platforms.
  • Trend data of the server memory capacity problem.
  • Fully Buffered DIMM (FB-DIMM) Server Memory Architecture


(HW2) Extensible Firmware Interface (EFI) new approach to BIOS design
Presenter: Vitaly Beliavtsev, Intel, Field Application Engineer
PDFDownload [PDF 8.69MB]

  • Find out why current BIOS architecture presents too many barriers for innovation to occur.
  • Benefits of EFI for hardware manufacturers, ODMs, ISVs, OS vendors and end users
  • How the Intel® Platform Innovation Framework for EFI serves as a basis for modern system firmware.
  • Intel EFI roadmap and industry support


(HW3) Balanced Technology Extended (BTX) new PC platform
Presenter: Les Fisher, Intel, Senior Technical Marketing Engineer

  • Challenges in todays PC form factor (ATX)
  • BTX program objectives and value proposition
  • BTX ingredients CPU thermal solution, boards, chassis, power supplies
  • Industry adoption and Intel enabling services.
  • BTX systems reference designs


(HW4) PCI Express* Architecture Overview and Implementations
Presenter: Dmitry Letichevsky, Intel, Channel Application Engineer

  • Important fundamentals of the PCI Express* architecture.
  • PCI Express improvements over legacy PCI buses.
  • RAS platform improvements enabled by PCI Express*.
  • PCI Express architecture implementation in multiple market segments and applications.



Cross-Architecture Software Development


(SW1) Intel® Compiler & Intel® Vtune™ : tools for enabling your applications to fly.
Presenter: Evgueny Khartchenko, Intel

    In this session we present Intel® software development tools VTune Performance Analyzers and Intel compilers. Youll learn their features and ways how to use these tools to extract the maximum application performance on Intel architectures.


(SW2) Multithreaded programming for innovative Intel architectures: efficient tools for development and optimization
Presenter: Dmitry Prohorov, Intel
PDFDownload [PDF 900KB]

  • Threading as an efficient way of programming for systems with shared memory: overview of basic concepts.
  • Threading programming models: Windows and Linux specifics.
  • Intel® Threading Tools: thread-safety and performance analysis of multithreaded applications.


(SW3) Intel Performance Primitives : dont spend time on low level optimization - focus on your application functionality instead.
Presenter: Andrei Petrov, Intel


(SW4) Inside XScale®
Presenters: Victoria Zhislina, Intel, EMEA Consumer ISV Enabling, Application Engineer; Vasily Basov, Intel

    Intel XScale processors family for PDAs and smartphones: Architecture features utilization for maximal performance gain obtaining in user applications. Effective work with memory and cach, usage of WirelessMMX Intel technology extension. Intel tools for mobile devices programming: VTune, Intel C/C++ compiler.



Mobile applications and wireless access


(MC1) Realizing the 2005 Mobile Platform Vision
Presenter: Michael Fechin, Intel
PDFDownload [PDF 9.35MB]
WMVDownload [WMV 27.85MB]

  • Intels Vision for the 2005 Mobile Platforms.
  • Demonstration of several expected 2005 capabilities.
  • Details on mobile platform support of digital home and digital office framework, including Extended Mobile Access, Simplified Network Selection, and Voice over IP usage models.
  • Selected technologies and their benefits for the 2005 Mobile Platforms.
  • Anticipated trends for 2006+ mobile platform usage.


(MC2) Bluetooth® Wireless Technology: Delivering the Best Experience in Next Generation Notebooks
Presenter: Dmitry Prohorov, Intel
PDFDownload [PDF 17.51MB]

    What you will learn from this session:
  • How Intel® Wireless Coexistence System Phase II improves audio quality when using Bluetooth headsets on Centrino Mobile Technology notebooks
  • Detailed explanation of new Bluetooth technical developments such as:
     – Adaptive Frequency Hopping (AFH)
     – High Quality Audio (AV Audio)
     – Enhanced Data Rate (EDR)
  • Platform specific guidelines for integrating Bluetooth modules into Centrino Mobile Technology notebooks


(MC3) Building a Digital Home Mobile PC
Presenter: Vitaly Beliavtsev, Intel, Field Application Engineer
PDFDownload [PDF 12.57MB]

  • Understand usage models for a digital home mobile PC - easy to use and configure, great performance, wireless connections, great battery life, media and entertainment.
  • Platform basics of a digital home mobile PC.
  • Know key hardware and software technologies to integrate for exciting digital home mobile PC.
  • Optimizations for a digital home mobile PC.


(MC4) Notebook Power Source Progress
Presenter: Vitaly Beliavtsev, Intel, Field Application Engineer
PDFDownload [PDF 5.32MB]

  • Challenges in energy density and capacity in notebook batteries.
  • Battery technology roadmap update.
  • High energy-density battery technology update:
     – Prototype demo
  • Fuel cell and battery hybrid model:
     – Demonstrations
     – Design recommendations



Telecommunications


(CT1) General session "Why Intel Xscale and Where?"
Presenter: Alexander Buravlev, Intel
PDFDownload [PDF 5.35MB]

    General session with Intel Xscale product roadmaps and reference solutions


(CT2) Developing with Intel IP Media Servers for Next Generation Networks
Presenters: Frank Casey, Intel, TelcoServer and Infrastructure Marketing Manager Intel SMG EMEA; Igor Chizh, CompTek
PDFDownload [PDF 7.86MB]
PDFDownload [PDF 4.58MB]

  • Developing with Intel IP Media Servers for Next Generation Networks (Intel VOIP Solutions - HMP- IA32 - Xscale - very clear picture )
  • Combined with DGOS016 Overcoming Today's Challenges for VOIP and working through the Firewalls and NATs


(CT4) Architecture of the Next Generation Telecom Equipment
Presenter: Frank Casey, Intel, TelcoServer and Infrastructure Marketing Manager Intel SMG EMEA
PDFDownload [PDF 3.91MB]

    High level review of architecture of the next generation telecom equipment (ATCA, PCIeX, Modular BB, WiMax, Xscale, IA32, backplane, dataplane)

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