Intel XScale® core
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Available at 266 MHz, 400 MHz, 533 MHz and 667 MHz |
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Delivers high MIPS/power consumption ratio and provides ample processing headroom for value-added software features |
| 32-bit 33/66 MHz PCI v2.2, host and option interface |
Provides flexibility to directly connect devices including 802.11x chips, PCMCIA controllers and cable MACs/PHYs |
USB
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USB v. 1.1 device controller |
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USB v. 2.0 host controller, supports low-speed and full-speed modes only |
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Industry-standard interface for connection to a wide array of devices |
32-bit, DDR1-266 SDRAM interface
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Optional ECC |
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32MByte to 1GByte of memory |
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High-bandwidth memory interface |
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Optional ECC improves system reliability |
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32-bit Expansion bus interface with parity
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Master/Target capable |
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25-bit address |
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Glueless connection to most other devices |
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External mastering capability allows external devices to communicate with each other and with internal peripherals resulting in shared memory subsystem design and lower system cost> |
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Integrated Ethernet MACs
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Up to three integrated 10/100 Ethernet MACs with SMII interface |
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Up to three integrated 10/100 Ethernet MACs with MII interface |
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Industry-standard networking interface lowers system bill of materials (BOM) cost |
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Multiple ports allow:
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Lower system cost |
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Multiple LAN port support |
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Concatenation of networking modules |
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| UTOPIA-2 Interface with multiple ADSL/G.SHDSL or VDSL PHY support |
Industry standard WAN interface |
| Two high-speed serial (HSS) ports for connecting to T1/E1 or SLIC/CODECs |
Connects to T1/E1 or SLIC/CODECs for voice support |
| Silicon functional assistance for Random Number Generation |
Accelerates public key exchange and authentication and key generation |
| Integrated hardware support for popular cryptography algorithms |
Acceleration for popular applications such as IPSec and SSL VPNs (AES/AES-CCM/3DES/DES/SHA-1/SHA-256/
SHA-384/SHA-512/MD-5/RSA/DSA/Diffie-Hellman algorithms) |
| Hardware support for IEEE1588 protocol |
Hardware assistance for Time Synchronization in a distributed control system containing multiple clocks |
| Two high-speed UARTs support up to 921Kbaud each |
Provides an interface for debug and passing control information |
| Integrated I2C and SSP interfaces |
Provides serial interfaces for common embedded and communications application: reduces system BOM cost |
| Spread spectrum clocking |
Improves system reliability by reducing EMI |
| Comprehensive pre-validated pre-integrated "out-of-the-box" development
infrastructures ready for application development using Linux*, VxWorks* |
Ease of design and fast time-to-market |
544-Ball PBGA Package
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35mm x 35mm, 1.27mm ball pitch |
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Lead-free packages available |
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Commercial temperature (0° to 70° C) |
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Extended temperature (-40° to 85° C) |
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High-performance package provides improved reliability |
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Lead-free packages help to meet environmental regulations |
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Extended temperature support for industrial control and automation applications |
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