| CSA Features |
| Theoretical bandwidth of 266Mbytes/sec |
Approximately twice the peak bandwidth of a 32bit 33MHz bus |
| Direct connect to the MCH of Intel® 875 chipset |
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Low-latency path to memory and higher platform performance |
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Relieves congestion for I/O devices connected to the I/O Control Hub (ICH) |
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| Uses only 13 signals |
Provides easier board routing than comparable PCI based systems |
| CSA is usable to both system software and the OS |
Conventional PCI-like configuration |
| Gigabit MAC/PHY Advanced Features |
| 40KB configurable RX and TX packet FIFO |
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No external FIFO memory requirements |
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FIFO size tunable to the application |
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| IEEE 802.3x-compliant flow-control support with software-controllable thresholds |
Reduced frame loss due to receive FIFO overrun |
| Programmable host memory receive buffers (256B to 16KB) |
Efficient usage of system resources |
| IEEE 802.3ab Auto-Negotiation |
Automatic link configuration including speed, duplex, and flow control |
| State-of-the-art DSP/analog architecture |
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1000Mb/s performance in noisy environments and cable installation problems |
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Implements digital adaptive equalization, echo,cross-talk and baseline wander cancellation |
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| PHY detects polarity, 2 pair vs. 4 pair cables |
Easier network installation and maintenance |
| Host Offloading Features |
| Transmit TCP segmentation IP, TCP, and UDP checksum off-loading capabilities on RX and TX |
Increased throughput and lower CPU utilization. Compatible with large send offload feature found in Windows* 2000 and Windows* XP |
| IEEE 802.1Q VLAN support with VLAN tag insertion and stripping and packet filtering for up to 64 simultaneous VLANs |
Enables IT staff to easily create multiple virtual LAN segments |
| Jumbo frame support up to 16KB |
High throughput for large data transfers on networks supporting jumbo frames |
| Interrupt moderation controls |
Reduces the number of interrupts generated by receive and transmit operations |
| Manageability Features |
| On-chip SMBus 2.0 port |
Enables IPMI and ASF implementations |
| ASF 1.0 and 2.0 |
Provides advanced alerting and remote control capabilities with industry-standard interfaces |
| Compliance with PCI Power Management v1.1/ACPI v2.0 |
PCI power management capability requirements for PC and embedded applications |
| Wake on LAN* (WoL) support |
Packet recognition wakeup for LOM applications without software configuration |
| Automatic link speed switching from 1000Mb/s down to 10 or 100Mb/s in standby |
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Low power in standby states |
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Supports power-down states without software assistance |
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| Additional Device Features |
| Four programmable LED outputs |
Customizable indications for link speed, activity, duplex, collisions, and port ID on each port |
| On-chip power regulator control circuitry |
Simplified low-cost power supply design |
| BIOS LAN Disable Pin |
Enables low-power LAN disable for LOM applications |